Heterostructure interconnects for high frequency applications

A method of forming an integrated circuit, comprising:

• providing a substrate comprising a semiconductor material;
• forming active components in the semiconductor material;
• forming a lower dielectric layer over the substrate;
• and
• forming an interconnect, comprising:
• forming a lower hBN layer on the lower dielectric layer, the lower hBN layer being one to three atomic layers thick;
• forming a lower graphene layer on the lower hBN layer, the lower graphene layer having at least one atomic layer of graphene;
• and
• forming a metal layer on the lower graphene layer.

A method of forming an integrated circuit, comprising:

• providing a substrate comprising a semiconductor material;
• forming active components in the semiconductor material;
• forming a lower dielectric layer over the substrate;
• and
• forming an interconnect, comprising:
• forming a metal layer above the lower dielectric layer;
• forming an upper graphene layer on the metal layer, the upper graphene layer having at least one atomic layer of graphene;
• forming an upper hBN layer on the upper graphene layer, the upper hBN layer being one to three atomic layers thick;
• and
• forming an upper dielectric layer on the upper hBN layer.