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US 9,793,197 B2Granted
Low profile leaded semiconductor package
AssigneeAdventive IP Bank
InventorRichard K Williams
Life of this patent
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Abstract
In a semiconductor package a lead having a bottom surface coplanar with the flat bottom surface of the plastic body extends outward at the bottom of the vertical side surface of the plastic body. The result is a package with a minimal footprint that is suitable for the technique known as “wave soldering” that is used in relatively low-cost printed circuit board assembly factories. Methods of fabricating the package are disclosed.
Claims16
A method of fabricating a semiconductor package comprising:
- thinning a metal piece at locations where a die pad and a cantilever segment of a lead are to be formed;
- thinning the metal piece at a location where a foot of the lead is to be formed;
- and
- severing the metal piece between the location of the die pad and the location of the cantilever segment of the lead.
1 more element
Dependencies are inferred from the claim text.