Methods of fabricating a semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsYong Kong Siew, Hyunsu Kim
Life of this patent
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Abstract
A method of fabricating a semiconductor device, the method including forming at least one interconnection structure that includes a metal interconnection and a first insulating pattern sequentially stacked on a substrate; forming barrier patterns covering sidewalls of the interconnection structure; forming second insulating patterns at sides of the interconnection structure, the second insulating patterns being spaced apart from the interconnection structure with the barrier patterns interposed therebetween; forming a via hole in the first insulating pattern by etching a portion of the first insulating pattern, the via hole exposing a top surface of the metal interconnection and sidewalls of the barrier patterns; and forming a via in the via hole.
Claims20
A method of fabricating a semiconductor device, the method comprising:
- forming at least one interconnection structure that includes a metal interconnection and a first insulating pattern sequentially stacked on a substrate;
- forming barrier patterns covering sidewalls of the interconnection structure;
- forming second insulating patterns at sides of the interconnection structure, the second insulating patterns being spaced apart from the metal interconnection and first insulating pattern of the interconnection structure with the barrier patterns interposed therebetween such that the barrier patterns isolate the first insulating pattern from the second insulating patterns;
- forming a via hole in the first insulating pattern by etching a portion of the first insulating pattern, the via hole exposing a top surface of the metal interconnection and sidewalls of the barrier patterns;
- and
- forming a via in the via hole.
A method of fabricating a semiconductor device, the method comprising:
- forming interconnection structures that each include a metal interconnection and a first insulating pattern sequentially stacked on a substrate and extending in one direction;
- forming barrier patterns that cover sidewalls of the interconnection structures;
- forming second insulating patterns that are in contact with the barrier patterns and that fill spaces between the interconnection structures, the second insulating patterns extending in the one direction;
- forming a hard mask layer such that the hardmask layer includes an opening on the interconnection structures and the second insulating patterns, the opening exposing a portion of the first insulating pattern;
- etching the portion of the first insulating pattern exposed by the opening to form a via hole in the first insulating pattern, the via hole exposing a top surface of the metal interconnection and sidewalls of the barrier patterns;
- and
- forming a via in the via hole,
- wherein:
- the second insulating patterns and the barrier patterns are formed of materials having an etch selectivity with respect to the first insulating pattern, and
- the second insulating patterns include a different material from the barrier patterns.
A method of fabricating a semiconductor device, the method comprising:
- forming interconnection structures that each include a metal interconnection and a first insulating pattern sequentially stacked on a substrate and extending in one direction;
- forming barrier patterns that cover sidewalls of the interconnection structures;
- forming second insulating patterns that are in contact with the barrier patterns and that fill spaces between the interconnection structures, the second insulating patterns extending in the one direction;
- forming a via hole in the first insulating pattern by etching a portion of the first insulating pattern, the via hole exposing a top surface of the metal interconnection and sidewalls of the barrier patterns;
- and
- forming a via in the via hole,
- wherein:
- the second insulating patterns and the barrier patterns are formed of materials having an etch selectivity with respect to the first insulating pattern, and
- the second insulating patterns include a different material from the barrier patterns.
Dependencies are inferred from the claim text.