Robust nucleation layers for enhanced fluorine protection and stress reduction in 3D NAND word lines

A method of manufacturing a semiconductor device, comprising:

• forming a stack of alternating layers comprising insulating layers and sacrificial material layers over a substrate;
• forming a plurality of memory openings through the stack;
• forming memory stack structures in the plurality of memory openings, each of the memory stack structures comprising, from outside to inside, a memory material layer, a tunneling dielectric layer, and a semiconductor channel;
• forming a backside via trench through the stack of alternating layers;
• forming backside recesses by removing the sacrificial material layers selective to the insulating layers employing an etchant introduced through the backside via trench;
• depositing a silicon-containing nucleation layer in the backside recesses;
• and
• forming at least one tungsten layer in the backside recesses after deposition of the silicon-containing nucleation layer;
• wherein control gate electrodes for the memory stack structures are formed at levels of the backside recesses;
• and
• wherein each of the control gate electrodes comprises a portion of the at least one tungsten layer,
• wherein the method comprises at least one feature selected from:
• a first feature of including additional steps of depositing a sacrificial tungsten layer directly on the silicon-containing nucleation layer, and forming a tungsten silicide layer by reacting the sacrificial tungsten layer and the silicon-containing nucleation layer, wherein the at least one tungsten layer is deposited directly on the tungsten silicide layer;
• a second feature that the at least one tungsten layer comprises a first tungsten layer having a fluorine concentration less than 1.0 parts per million, and a second tungsten layer having a fluorine concentration greater than 3.0 parts per million and spaced from the memory stack structures by the first tungsten layer;
• a third feature of including an additional step of converting at least a portion of the silicon-containing nucleation layer to a tungsten nucleation layer by exposing the silicon-containing nucleation layer to a tungsten-containing precursor gas without hydrogen-containing gas which functions as a reduction agent prior to formation of the at least one tungsten layer;
• and
• a fourth feature that the silicon-containing nucleation layer is deposited as a conformal amorphous silicon layer, and the method further comprises anisotropically etching the conformal amorphous silicon layer by introducing an etchant through the backside via trench, wherein a variable thickness silicon layer having a variable thickness that increases with a lateral distance from the backside via trench is formed.