Shift register unit, gate drive circuit, and display device
AssigneeEverDisplay Optronics (Shanghai) Limited
InventorsLina Xiao, Ying-Hsiang Tseng
Life of this patent
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Abstract
The present disclosure discloses a shift register unit, a gate drive circuit, and a display device. The shift register unit includes first to twelfth switch elements, a first capacitor, and a second capacitor. The first switch element switches on in response to an input signal, the second switch element switches on in response to a first clock signal, the third, the ninth and the twelfth switch elements switch on in response to a signal of the second node, the fourth switch element switches on in response to a signal of the first node, and the fifth, the seventh and the eleventh switch elements switch on in response to a second clock signal.
Claims11
A shift register unit, comprising:
- a first switch element, configured to switch on in response to an input signal to provide a first clock signal to a first node;
- a second switch element, configured to switch on in response to the first clock signal to provide a first power signal to the first node;
- a third switch element, coupled to a second node, and configured to switch on in response to a signal of the second node to provide a second power signal to a third node;
- a fourth switch element, coupled to the first node, and configured to switch on in response to a signal of the first node;
- a fifth switch element, configured to switch on in response to a second clock signal, and coupled to the fourth switch element;
- a sixth switch element, coupled to a fourth node, and configured to switch on in response to a signal of the fourth node to provide the second power signal to the second node;
- a seventh switch element, configured to switch on in response to the second clock signal to provide the input signal to the second node;
- an eighth switch element, coupled to the third node, and configured to switch on in response to a signal of the third node to provide the first clock signal to the fourth node;
- a ninth switch element, coupled to the second node, and configured to switch on in response to the signal of the second node to provide the second power signal to the fourth node;
- a tenth switch element, coupled to the fourth node, and configured to switch on in response to a signal of the fourth node to provide the second power signal to an output terminal;
- an eleventh switch element, configured to switch on in response to the second clock signal to provide the second power signal to the output terminal;
- a twelfth switch element, coupled to the second node, and configured to switch on in response to the signal of the second node to provide the first clock signal to the output terminal;
- a first capacitor, coupled between the second power signal and the fourth node;
- and
- a second capacitor, coupled between the second node and the output terminal.
Dependencies are inferred from the claim text.