Ramping inhibit voltage during memory programming
AssigneeIntel Corporation
InventorsShantanu R. Rajwade, Pranav Kalavade, Neal R. Mielke, Krishna K. Parat, Shyam Sunder Raghunathan
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AssigneeIntel Corporation
InventorsShantanu R. Rajwade, Pranav Kalavade, Neal R. Mielke, Krishna K. Parat, Shyam Sunder Raghunathan
Estimating the term…
The inhibit voltage is a voltage applied to wordlines adjacent to a program wordline having a memory cell to write during the program operation. The inhibit voltage for a program operation can be ramped up during the program pulse. Instead of applying a constant high inhibit voltage that results in the initial boosted channel potential reducing drastically due to leakage, a system can start the inhibit voltage lower and ramp the inhibit voltage up during the program pulse. The ramping up can be a continuous ramp or in finite discrete steps during the program pulse. Such ramping of inhibit voltage can provide better tradeoff between program disturb and inhibit disturb.
A method comprising:
A memory subsystem, comprising:
An electronic device comprising:
Dependencies are inferred from the claim text.