Nonvolatile semiconductor memory device and memory system
AssigneeToshiba Memory Corporation
InventorsYasuhiro Hirashima, Masaru Koyanagi
Life of this patent
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Abstract
A memory device includes a nonvolatile semiconductor memory cell array, a plurality of terminals through which control signals are received to control the memory device, an on-die termination circuit connected to at least one of the terminals and having a variable resistor, and a control circuit. The control circuit is configured to enable the on-die termination circuit in response to an enabling signal to enable the on-die termination circuit, with a resistance of the variable registor at different values depending on whether a control signal is asserted or deasserted when the enabling signal is received.
Claims17
A memory device, comprising:
- a nonvolatile semiconductor memory cell array;
- a plurality of terminals through which control signals are received to control the memory device, the plurality of terminals including a first terminal to receive data, a second terminal to receive a clock signal, and a third terminal to receive a read enable signal;
- an on-die termination circuit connected to at least one of the first, second, and third terminals and having a variable resistor;
- and
- a control circuit configured to enable the on-die termination circuit in response to an enabling signal to enable the on-die termination circuit, a resistance of the variable resistor of the on-die termination circuit being set at different values depending on whether a control signal is asserted or deasserted when the enabling signal is received.
A memory system, comprising:
- a plurality of nonvolatile semiconductor memory modules, each including:
- a plurality of terminals through which control signals are received to control the nonvolatile semiconductor memory module,
- an on-die termination circuit connected to at least one of the terminals, and
- a control circuit configured to control the on-die termination circuit;
- and
- a controller configured to;
- enable a first nonvolatile semiconductor memory module, and
- while the first nonvolatile semiconductor memory module is enabled, deassert a signal for enabling a second nonvolatile semiconductor memory module to disable the second nonvolatile semiconductor memory module, and transmit an enabling signal to enable the on-die termination circuit of the second nonvolatile semiconductor memory module.
Dependencies are inferred from the claim text.