Method, system and device for read signal generation

A circuit comprising:

• an impedance circuit element connected to an output terminal;
• a first subcircuit connectable between a first source voltage and the output terminal to limit a source current applied to the output terminal;
• and
• a second subcircuit connected to the output terminal to limit a voltage applied to the output terminal,
• wherein a load current and voltage at the output terminal applied to the impedance circuit element are sufficient to maintain the voltage applied to the output terminal, said voltage at the output terminal being a reference voltage, wherein the first subcircuit comprises a first diode connected field effect transistor (FET), wherein the voltage at the output terminal is based, at least in part, on an impedance of the first diode connected FET, and wherein the second subcircuit further comprises a correlated electron switch (CES), and wherein the voltage applied to the output terminal is determined based, at least in part, on the impedance of the first diode connected FET and an impedance of the CES.

A circuit comprising:

• an impedance circuit element connected to an output terminal;
• a first subcircuit connectable between a first source voltage and the output terminal to limit a source current applied to the output terminal;
• and
• a second subcircuit connected to the output terminal to limit a voltage applied to the output terminal,
• wherein a load current and voltage at the output terminal applied to the impedance circuit element are sufficient to maintain the voltage applied to the output terminal, said voltage at the output terminal being a reference voltage, wherein the voltage at the output terminal is applied to a terminal of the impedance circuit element, said impedance circuit element being capable of having an impedance state, wherein a load current and voltage at the output terminal applied across terminals of the impedance circuit element are sufficient to enable detection of the impedance state of the impedance circuit element while maintaining the impedance state, and wherein the second subcircuit is configured to limit the voltage at the output terminal to inhibit a change in the impedance state from a low impedance or conductive state to a high impedance or insulative state.

A method comprising:

• limiting a load current across terminals of an impedance circuit element connected to an output terminal, the impedance circuit element being capable of having an impedance state, the load current being determined based, at least in part, on a source current generated by a first subcircuit;
• limiting a voltage of a signal applied across the terminals of the impedance circuit element, the voltage of the signal being determined based, at least in part, on a second subcircuit;
• and
• applying a programming signal across the terminals of the impedance circuit element to place the impedance circuit element in a high impedance or insulative state prior to application of a read signal in a read operation,
• wherein the load current and the voltage of the signal applied across the terminals of impedance circuit element are sufficient to enable detection of the impedance state of the impedance circuit element while maintaining the impedance state, and wherein the voltage of the read signal is limited so as to inhibit a change of the impedance state of the impedance circuit element from the high impedance or insulative state to a low impedance or conductive state in the read operation.

A method comprising:

• limiting a load current across terminals of an impedance circuit element connected to an output terminal, the impedance circuit element being capable of having an impedance state, the load current being determined based, at least in part, on a source current generated by a first subcircuit;
• limiting a voltage of the signal applied across the terminals of the impedance circuit element, the voltage of the signal being determined based, at least in part, on a second subcircuit;
• and
• applying a programming signal across the terminals of the impedance circuit element to place the impedance circuit element in a low impedance or conductive state prior to application of a read signal in a read operation,
• wherein the load current and the voltage of the signal applied across the terminals of impedance circuit element are sufficient to enable detection of the impedance state of the impedance circuit element while maintaining the impedance state, and
• wherein the load current of the read signal is controlled so as to inhibit a change of the impedance state of the impedance circuit element from the low impedance or conductive state to a high impedance or insulative state in the read operation.

A method comprising:

• limiting a load current across terminals of an impedance circuit element connected to an output terminal, the impedance circuit element being capable of having an impedance state, the load current being determined based, at least in part, on a source current generated by a first subcircuit;
• and
• limiting a voltage of the signal applied across the terminals of the impedance circuit element, the voltage of the signal being determined based, at least in part, on a second subcircuit,
• wherein the load current and the voltage of the signal applied across the terminals of impedance circuit element are sufficient to enable detection of the impedance state of the impedance circuit element while maintaining the impedance state, wherein impedance circuit element comprises a correlated electron switch (CES) device, further comprising detecting the impedance state of the CES device based, at least in part, on a current on a bitline connected to the CES device during a read operation.