Three dimensional resistive memory architectures

A three dimensional resistive memory architecture comprising:

• adjacent tiles, each tile comprising:
• a multilevel resistive crossbar array comprising layers of row crossbars, layers of column crossbars, and four layers of resistive memory elements interposed between cross points of the row crossbars and column crossbars;
• in which three layers of the resistive memory elements are at least partially addressed by decoders in adjacent tiles;
• in which a layer of row crossbars extends from a first tile through an adjacent tile and is used to address resistive memory elements in the adjacent tile and a layer of row crossbars extends from the first tile through a different adjacent tile and is used to address resistive memory elements in the different adjacent tile;
• and
• two decoders underlying the multilevel resistive crossbar array, each decoder comprising an address matrix comprising an array of first decoders, an array of final decoders, digital lines and analog lines;
• the first decoder being to select an analog line from the address matrix and a digital line from the address matrix based on an address;
• the final decoders including a row decoder and a column decoder, the row decoder being to select a row crossbar, the column decoder being to select a column crossbar, the row decoder being shared by the first tile and the adjacent tile and the column decoder being shared by the first tile and a different adjacent tile;
• in which each of the final decoders comprise an NMOS transistor with a gate connected to one of the digital lines, a source connected to an analog line, and a via connected to a drain, the via extending upward and connected to a crossbar in the multilevel resistive crossbar array;
• in which the digital lines are to select which analog lines to connect to the row crossbars and the column crossbars by applying a switching voltage to the gates of the NMOS transistors to make bidirectional connections between the vias and the analog lines, in which the analog lines are to supply signals to crossbars in the multilevel resistive crossbar array.