Gate driver on array circuit and liquid crystal display adopting the same

A liquid crystal display, comprising:

• a source driver, for outputting data signal to a plurality of pixel units to show images;
• and
• a gate driver on array (GOA) substrate, comprising:
• a plurality of GOA circuit units, connected in cascade, with the GOA circuit unit at each stage outputting a scan signal from an output terminal based on a scan signal outputted by a previous stage GOA circuit unit, a scan signal outputted by a next stage GOA circuit unit, a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, a first enabling signal and a second enabling signal, wherein the GOA circuit unit at each stage comprises:
• a scan control module, comprising:
• a first transistor, comprising a gate electrically connected to the first enabling signal, a source electrically connected to the scan signal outputted by a next stage GOA circuit unit;
• a second transistor, comprising a gate electrically connected to the second enabling signal, and a source electrically connected to the scan signal outputted by the previous stage GOA circuit unit;
• a third transistor, comprising a gate electrically connected to the first enabling signal, and a source electrically connected to the fourth clock signal;
• a fourth transistor, comprising a gate electrically connected to the second enabling signal, and a source electrically connected to the second clock signal;
• a fifth transistor, comprising a gate electrically connected to scan signals outputted by the next stage GOA circuit unit or the previous stage GOA circuit unit, and a source electrically connected to a first constant voltage;
• and
• a sixth transistor, comprising a gate electrically connected to scan signals outputted by a previous stage GOA circuit unit or a next stage GOA circuit unit, and a source electrically connected to a drain of the fifth transistor;
• an input control module, electrically connected to drains of the first and second transistors, for turning on the scan signals outputted by the previous stage GOA circuit unit or next stage GOA circuit unit based on the third clock signal;
• an output control module, electrically connected to a control node, for controlling the output of the scan signal based on a voltage imposed on the control node;
• a voltage regulating module, electrically connected to the output control module, for stabilizing the voltage of the control node to prevent current leakage;
• a pull-up holding module, electrically connected to the input control module, scan control module, output control module and voltage regulating module, for holding the control node at a high level during non-scanning periods, and holding the scan signal at a high level;
• and
• a pull-up facilitating module, electrically connected to the pull-up holding module, for controlling leakage of the input control module during the period when the control node is being charged.