System on chip module configured for event-driven architecture
AssigneeNational Technology & Engineering Solutions of Sandia, LLC
InventorsKevin Robbins, Charles E. Brady, Tad A. Ashlock
Life of this patent
Estimating the term…
Abstract
A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.
Claims13
A computing device comprising:
- a system on chip (SoC) module, the SoC module comprises:
- a processor subsystem, the processor subsystem comprises:
- a processor;
- and
- memory that comprises:
- an event broker component that is executed by the processor, the event broker component configured to detect receipt of a predefined event message at the processor subsystem;
- and
- a process that conforms to an event-driven architecture, wherein the event broker component is further configured to cause the processor to execute the process responsive to the event broker component detecting receipt of the predefined event message at the processor subsystem, the process configured to cause the processor to generate an output event message responsive to the processor executing the process;
- and
- a hardware logic subsystem, the hardware logic subsystem comprises:
- event broker logic that is configured to detect receipt of a predefined second event message at the hardware logic subsystem;
- and
- a hardware logic module that conforms to the event-driven architecture, wherein the event broker logic is further configured to trigger operation of the hardware logic module responsive to the event broker logic detecting receipt of the predefined second event message, the hardware logic module configured to generate a second output event message responsive to being triggered;
- wherein the processor subsystem and the hardware logic subsystem are configured to communicate with one another.
A System on Chip (SoC) module comprising:
- a processor subsystem;
- and
- a field programmable gate array (FPGA) fabric that is in communication with the processor subsystem, the processor subsystem and the FPGA fabric configured with event-driven functionality, the processor subsystem configured to generate first event messages and cause the first event messages to be accessible to the FPGA fabric, the FPGA fabric configured to generate second event messages and cause the second event messages to be accessible to the processor subsystem.
Dependencies are inferred from the claim text.