US 9,792,244 B2 · Multiple processor architecture with flexible external input/output interface

Abstract

A multiple processor architecture with flexible external input/output interface is provided. In one embodiment, an open flexible processor architecture avionics device comprises: a multiple processor architecture having a primary processor, a secondary processor, a random access memory (RAM) coupled to at least the secondary processor, and a shared memory coupled to the primary and secondary processor; and a flexible input/output (I/O) interface coupled to the multiple processor architecture, wherein the flexible I/O interface provides I/O access to the primary processor using a fixed I/O protocol, and provides I/O access to the secondary processor using at least one re-configurable I/O protocol; wherein the primary processor is dedicated to executing embedded software for implementing a primary base functionality, the primary processor has read and write access to the shared memory, and the primary processor is not reprogrammable; and wherein the secondary processor has read-only access to the shared memory and is programmable.

Claims20

Dependent claims

An open flexible processor architecture avionics device, the device comprising:

a multiple processor architecture having at least a primary processor, at least a secondary processor, a random access memory (RAM) coupled to at least the secondary processor, and a shared memory coupled to the primary processor and the secondary processor;
and
a flexible input/output (I/O) interface coupled to the multiple processor architecture, wherein the flexible I/O interface provides I/O access to the primary processor using a fixed I/O protocol, and provides I/O access to the secondary processor using at least one re-configurable I/O protocol;
wherein the primary processor is dedicated to executing embedded software for implementing a primary base functionality, the primary processor has read and write access to the shared memory, and the primary processor is not reprogrammable;
and
wherein the secondary processor has read-only access to the shared memory and is programmable.

3 more elements

A method for an open flexible processor architecture avionics device, the method comprising:

executing a primary base function on a primary processor of the avionics device, wherein the primary processor is non-field-programmable;
executing at least one secondary function on a secondary processor of the avionics device, where the secondary processor is field-programmable;
sharing data generated by the primary base function with the secondary base function via a memory, wherein the secondary processor has only read-only access to the memory;
and
operating a flexible input/output (I/O) interface within the avionics device to communicate data between at least one host system and the primary processor, and communicate data between the at least one host system and the secondary processor, wherein the flexible I/O interface implements a fixed I/O protocol to communicate with the primary processor and implements at least one reconfigurable I/O protocol to communicate with the secondary processor, wherein the at least one reconfigurable I/O protocol is configurable by the secondary processor.

2 more elements

Dependencies are inferred from the claim text.

Multiple processor architecture with flexible external input/output interface

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Multiple processor architecture with flexible external input/output interface

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Abstract

Claims20