Cache memory for particular data

A processor comprising:

• a cache unit;
• and
• a CPU configured to perform operation of data acquired from the cache unit, wherein
• the cache unit comprises:
• a first memory configured to temporarily hold the data and an address of the data;
• a second memory configured to temporarily hold an address of a particular data set in advance, the particular data being not held by the first memory;
• and a controller comprising a first comparison/control module that includes a data comparing module configured to judge whether arbitrary data is the particular data or not and an address comparing module configured to search for a storage destination of an arbitrary address,
• wherein, when a first address is specified by the CPU and an instruction to load data is made, the controller searches for a storage destination of the first specified address, outputs the data of the first specified address if the storage destination is the first memory, and outputs the particular data to the CPU if the storage destination is the second memory, and
• wherein, when an instruction to store specified data at a second specified address is made by the CPU, the controller judges whether the specified data is the particular data or not, stores the second specified address and the specified data into the first memory if the specified data is not the particular data, and stores the second specified address into the second memory if the specified data is the particular data.

A cache unit comprising:

• a first memory configured to temporarily hold first data and an address of the first data;
• a second memory configured to temporarily hold an address of a particular data set in advance, the particular data being not held by the first memory;
• a buffer configured to hold second data and an address of the second data to be provided to the first memory and the second memory;
• and
• a controller comprising a first comparison/control module and a second comparison/control module, the first comparison/control module including a data comparing module configured to judge whether arbitrary data is the particular data or not and an address comparing module configured to search for a storage destination of an arbitrary address, and the second comparison/control module including a data comparing module configured to judge whether the data outputted from the buffer is the particular data or not,
• wherein when an instruction to store specified data at a second specified address is made, the controller judges whether the specified data is the particular data or not, stores the second specified address and the specified data into the first memory if the specified data is not the particular data, and stores the second specified address into the second memory if the specified data is the particular data.