Heuristics for improving performance in a tile based architecture

A graphics processing pipeline, comprising:

• a world-space pipeline;
• a screen-space pipeline;
• and
• a tiler that:
• stores, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles associated with the first plurality of graphics primitives;
• determines, based on a first condition that indicates a transition between an early z-test mode and a late z-test mode, that the first plurality of graphics primitives should be replayed from the buffer;
• and
• in response, replays the first plurality of graphics primitives against a first tile included in a first plurality of tiles by:
• comparing each graphics primitive included in the first plurality of graphics primitives against the first tile to determine whether the graphics primitive intersects the first tile;
• determining that one or more graphics primitives included in the first plurality of graphics primitives intersects the first tile;
• and
• transmitting the one or more graphics primitives and one or more state bundles associated with the one or more graphics primitives and included in the first plurality of state bundles for processing.

A computing device, comprising:

• a memory;
• and
• a graphics processing pipeline that includes:
• a world-space pipeline;
• a screen-space pipeline;
• and
• a tiler that:
• stores, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles associated with the first plurality of graphics primitives;
• determines, based on a first condition that indicates a transition between processing modes, that the first plurality of graphics primitives should be replayed from the buffer;
• and
• in response, replays the first plurality of graphics primitives against a first tile included in a first plurality of tiles by:
• comparing each graphics primitive included in the first plurality of graphics primitives against the first tile to determine whether the graphics primitive intersects the first tile;
• determining that one or more graphics primitives included in the first plurality of graphics primitives intersects the first tile;
• and
• transmitting the one or more graphics primitives and one or more state bundles associated with the one or more graphics primitives and included in the first plurality of state bundles for processing.