Liquid crystal display device with gate clock signals having specific slew rate

A display panel comprising:

• an array of pixels;
• a plurality of gate lines connected to the pixels and configured to transfer, during an image display period, gate pulses generated from at least gate clock signals comprising a first gate clock signal and a second gate clock signal that have a gap value and a slew rate value;
• and
• a plurality of data lines connected to the pixels and configured to transfer, during the image display period, data voltages needed for displaying images via the pixels,
• whereby the gap value and the slew rate value are based upon an adjustment resulting in a Vertical Stripe Figure Of Merit (VSFOM) value that is as close to zero as possible, and
• wherein the gap value between the gate clock signals is any one among a plurality of gap values between the gate clock signals included within a range in which an area of second touch electrodes perpendicular to the gate lines is brighter than an area of first touch electrodes parallel to the gate lines in a graph representing a difference in brightness between the area of the second touch electrodes and the area of the first touch electrodes based on the gap values between the gate clock signals.

A controller implemented in a display device, the controller comprising:

• a storage unit configured to store a first slew rate control signal and a second slew rate control signal;
• a first generator configured to generate a first clock by changing a resistance of at least two variable resistors using the first and second slew rate control signals;
• a second generator configured to generate a second clock by changing a resistance of at least two variable resistors using the first and second slew rate control signals;
• and
• a delay unit configured to generate a first gate clock and a second gate clock having a gap value by delaying the first and second clocks using a gap control signal obtained from the storage unit.