Power saving circuit and electronic device having the same

A power saving circuit interposed between a power supply unit and a device circuit, comprising:

• a variable resistor, a switch and a processing module, the power supply unit connected between the switch and the variable resistor, the processing module connected between the switch and the variable resistor, the switch connected with the variable resistor, the switch capable of conducting the power supply unit and the processing module when the variable resistor is pressed, the processing module capable of transmitting a working signal to the switch for making the switch continuing conducting the power supply unit and the processing module when the variable resistor is unpressurized after the power is transmitted to the processing module, the processing module capable of detecting the condition of the voltage of the variable resistor to change the working signal, the switch capable of breaking the power supply of the processing module if the working signal is off state;
• wherein the variable resistor comprises a first end and a second end, the switch comprises a p-channel metal oxide semiconductor field effect transistor (p-channel MOSFET, PMOS transistor) and a n-channel metal oxide semiconductor field effect transistor (n-channel MOSFET, NMOS transistor), the processing module comprises a power pin, a signal pin and a voltage pin, the positive of the power supply unit is connected to the source of the PMOS transistor and the first end of the variable resistor, the second end of the variable resistor is connected to the gate of the NMOS transistor, the second end of the variable resistor and the gate of the NMOS transistor are connected to ground potential via a resistor and connected to the voltage pin, the source of the NMOS transistor is connected to ground potential, the drain of the NMOS transistor is connected to the gate of the PMOS transistor, the drain of the PMOS transistor is connected to the power pin, the positive of the power supply unit and the source of the PMOS transistor are connected between the gate of the PMOS transistor, the drain of the NMOS transistor and the signal pin via a resistor.