# US 9,787,319 B2 · Signal modulation circuit

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- Number: US 9,787,319 B2
- Document ID: US9787319B2
- Status: Granted
- Kind: B2
- Application number: 15/137,129
- Filed: 2016-04-25
- Published: 2016-08-18
- Granted: 2017-10-10
- Earliest claimed: 2013-06-11
- Assignees: Onkyo Corporation
- Applicants: Onkyo Corporation
- Inventors: Yoshinori Nakanishi; Tsuyoshi Kawaguchi; Mamoru Sekiya
- Web page: https://patentgrep.com/patent/US9787319B2

## CPC

- H03M 3/37: {Compensation or reduction of delay or phase error}
- G11B 20/10009: {Improvement or modification of read or write signals}
- H03M 3/30: {Delta-sigma modulation}
- H03M 3/346: {by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases}
- H03M 3/348: {using return-to-zero signals}
- H03M 3/424: {the quantiser being a multiple bit one}
- H04R 3/00: Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F)
- G11B 2020/00065: {Sigma-delta audio encoding}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R)
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)

## Abstract

Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtractor, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

## Claims

### Claim 1

A signal modulation circuit for performing delta sigma modulation on an input signal in synchronization with a clock signal to output the modulated signal, the circuit comprising:
a subtractor for calculating a difference between the input signal and a feedback signal;
an integrator for integrating an output signal from the subtractor;
a zero level inserting circuit for inserting a zero level into the signal integrated by the integrator at timing synchronized with the clock signal;
a quantizer for delaying the signal output from the zero level inserting circuit and quantizing the delayed signal; and
a feedback circuit for feeding back the signal quantized by the quantizer to the input signal.

### Claim 2 (depends on 1)

The signal modulation circuit according to claim 1, wherein
the zero level inserting circuit includes
a frequency divider for dividing a frequency of the clock signal, and
a chopper circuit that operates according to the clock signal whose frequency is divided by the frequency divider.

### Claim 3 (depends on 1)

The signal modulation circuit according to claim 1, wherein
the quantizer is configured by a D-type flip-flop.

### Claim 4 (depends on 1)

The signal modulation circuit according to claim 1, wherein
the zero level inserting circuit and the quantizer are configured by a D-type flip-flop, and the clock signal is supplied to a reset terminal of the D-type flip-flop.