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US 9,786,774 B2Granted
Metal gate of gate-all-around transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJean-Pierre Colinge, Chi-Wen Liu
Life of this patent
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Abstract
The disclosure relates to a semiconductor device. An exemplary structure for a semiconductor device comprises a nanowire structure comprising a channel region between a source region and a drain region; and a metal gate surrounding a portion the channel region, wherein the metal gate comprising a first gate portion adjacent to the source region having a first thickness and a second gate portion adjacent to the drain region having a second thickness less than the first thickness.
Claims20
A semiconductor device comprising:
- a nanowire structure comprising a channel region between a source region and a drain region;
- a first isolation region over the source region;
- a second isolation region adjacent the source region and the first isolation region;
- a gate dielectric over the first isolation region and the second isolation region;
- and
- a metal gate surrounding a portion of the channel region, the metal gate comprising:
- a first gate portion contacting a top surface of the gate dielectric, the first gate portion having a vertical region and a horizontal region, the vertical region having a first thickness, the horizontal region disposed over the first isolation region and the second isolation region;
- and
- a second gate portion over the first gate portion, the second gate portion having a second thickness less than the first thickness.
6 more elements
A semiconductor device comprising:
- a first nanowire transistor comprising:
- a first nanowire structure comprising a first channel region between a first source region and a first drain region, and
- a first metal gate surrounding a portion of the first channel region, the first metal gate comprising:
- a first gate portion adjacent to the first source region having a first thickness, and
- a second gate portion adjacent to the first drain region having a second thickness less than the first thickness;
- and
- a second nanowire transistor comprising:
- a second nanowire structure comprising a second channel region between a second source region and a second drain region, and
- a second metal gate surrounding a portion of the second channel region, the second metal gate having a uniform thickness.
6 more elements
A semiconductor device comprising:
- a drain region;
- a source region;
- a channel region between the drain region and the source region;
- and
- a metal gate surrounding a portion of the channel region, the metal gate comprising:
- a neck region proximate the drain region, the neck region having a first region with a first width and a second region with a second width greater than the first width, wherein the neck region is a first material;
- and
- a shoulder portion proximate the source region, the shoulder portion having a third width greater than the first width and the second width, wherein the shoulder portion is the first material.
5 more elements
Dependencies are inferred from the claim text.