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US 9,780,184 B2Granted
Electronic device with asymmetric gate strain
AssigneeMicron Technology, Inc.
InventorsGurtej S. Sandhu, Kunal R. Parekh
Life of this patent
Estimating the term…
Abstract
The use of strained gate electrodes in integrated circuits results in a transistor having improved carrier mobility, improved drive characteristics, and reduced source drain junction leakage. The gate electrode strain can be obtained through non symmetric placement of stress inducing structures as part of the gate electrode.
Claims11
A method of forming a transistor, comprising:
- forming a gate electrode over a gate dielectric on a substrate;
- and
- forming sidewall spacers on first and second sides of the gate electrode;
- and
- wherein at least one of the gate electrode and the spacers on the first and second sides are constructed to induce an asymmetrical strain into the transistor between a first region proximate the first side of the gate electrode and a second region proximate the second side of the gate electrode;
- wherein the asymmetrical strain is caused, at least in part, by forming the gate electrode having a different thickness on the first side than on the second side, including removing a portion of the gate electrode to form an electrode with a different height on the first side than on the second side.
3 more elements
A method of forming a transistor, the method comprising:
- forming a gate electrode over a gate dielectric on a substrate;
- and
- forming sidewall spacers on first and second sides of the gate electrode;
- and
- wherein at least one of the gate electrode and the spacers on the first and second sides are constructed to induce an asymmetrical strain into the transistor between a first region proximate the first side of the gate electrode and a second region proximate the second side of the gate electrode;
- wherein forming dielectric spacers on first and second sides of the gate electrode includes,
- forming both a first dielectric spacer and an additional dielectric spacer on the first side of the gate electrode and forming a second dielectric spacer on the second side of the gate electrode,
- removing the first dielectric spacer before forming the additional spacer, such that the additional spacer is formed on the first side of the gate electrode in place of the first dielectric spacer, and
- wherein removing the first dielectric spacer includes,
- covering the second dielectric spacer with a protective layer,
- ion implanting the first conductive spacer, and
- removing the ion implanted first conductive spacer.
9 more elements
A method of forming a transistor, the method comprising:
- forming a gate electrode over a gate dielectric on a substrate;
- and
- forming sidewall spacers on first and second sides of the gate electrode;
- and
- wherein at least one of the gate electrode and the spacers on the first and second sides are constructed to induce an asymmetrical strain into the transistor between a first region proximate the first side of the gate electrode and a second region proximate the second side of the gate electrode;
- wherein the asymmetrical strain is formed, at least in part, by a difference between at least one spacer on the first side of the gate electrode and a spacer on the second side of the gate electrode,
- wherein a spacer on one side of the gate electrode is implanted with ions, and a spacer on the opposite side of the gate electrode is not implanted with ions.
4 more elements
Dependencies are inferred from the claim text.