Methods for providing redundancy in a memory array comprising mapping portions of data associated with a defective address
AssigneeMicron Technology, Inc.
InventorsViolante Moschiano, Giovanni Santin, Maria-Luisa Gallese, Luigi Pilolli
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Abstract
Methods for providing redundancy in a memory include mapping a portion of first data associated with an address of the memory determined to indicate a defective memory cell to an address of a redundant area of the memory array, and writing second data to the memory array, wherein a portion of the second data is written to a column of the memory array associated with the address of the memory determined to indicate a defective memory cell for the first data.
Claims17
A method for providing redundancy in a memory having a memory array, wherein one or more addresses of the memory array have been determined to indicate a defective memory cell, the method comprising:
- inputting first data from I/O connections for a first programming operation;
- mapping a portion of the first data associated with an address of the memory determined to indicate a defective memory cell to an address of a redundant area of the memory array;
- inputting second data from the I/O connections for a second programming operation;
- and
- writing the second data to the memory array, wherein a portion of the second data is written to a column of the memory array associated with the address of the memory determined to indicate a defective memory cell for the first data.
A method for providing redundancy in a memory, wherein the memory has a memory array and one or more addresses of the memory array have been determined to indicate a defective memory cell, the method comprising:
- inputting first data from I/O connections of the memory, and loading the first data for programming into a row of the memory array for a first programming operation;
- writing the first data to the memory array, including mapping a portion of the first data associated with an address of the memory array determined to indicate a defective memory cell of a particular column of the memory array to an address of a redundant area of the memory array;
- inputting second data from the I/O connections of the memory, and loading the second data for programming into a different row of the memory array for a second programming operation;
- and
- writing the second data to the memory array, including mapping a portion of the second data associated with an address of the memory array determined to indicate a defective memory cell of a different column of the memory array to an address of a redundant area of the memory array, and without mapping any portion of the second data associated with an address of the memory array of the particular column of the memory array to an address of a redundant area of the memory array, such that a portion of the second data is written to the particular column of the memory array.
A method for providing redundancy in a memory having a memory array, wherein a plurality of addresses of the memory array have been determined to indicate a defective memory cell, the method comprising:
- inputting first data from I/O connections for a first programming operation;
- mapping each portion of the first data associated with a respective address of the memory determined to indicate a defective memory cell to a respective address of a redundant area of the memory array;
- inputting second data from the I/O connections for a second programming operation;
- and
- writing the second data to the memory array, wherein portions of the second data are each written to a respective column of the memory array associated with the address of the memory determined to indicate a defective memory cell for its respective portion of the first data.
Dependencies are inferred from the claim text.