Hybrid tracking of transaction read and write sets
AssigneeInternational Business Machines Corporation
InventorsMichael Karl Gschwind, Valentina Salapura, Chung-Lung K. Shum
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AssigneeInternational Business Machines Corporation
InventorsMichael Karl Gschwind, Valentina Salapura, Chung-Lung K. Shum
Estimating the term…
Embodiments of the invention relate to tracking processor transactional read and write sets, thereby eliminating speculative mispredictions. Both non-speculative read set and write set indications are maintained for a transaction. The indications are stored in cache. In addition, load and write queues of addresses are maintained. The load queue of addresses relates to speculative members of a read set and the write queue of addresses relates to speculating member of a write set. For a received read request, a transaction resolution process takes place, and a resolution is performed if an address match in the write queue is detected. Similarly, for a receive write request the transaction interference additionally checks the load queue and the non-speculative read set for the pending address.
A computer implemented method for tracking of processor transactional read and write sets comprising:
Dependencies are inferred from the claim text.