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US 9,755,866 B2Granted
Direct digital sequence detector and equalizer based on analog-to-sequence conversion
Assignee9011579 Canada Incorporee
InventorsMasum Hossain, Maruf H. Mohammad
Life of this patent
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Abstract
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.
Claims18
An integrated circuit (IC), comprising:
- a sample-and-hold circuit to sample an input signal based on a clock signal, and to output a sampled voltage for at least a holding period, wherein the input signal is received over a communication channel;
- a plurality of adjustable comparators, wherein each adjustable comparator has a respective reference voltage that is adjustable, wherein each adjustable comparator outputs a result signal based on comparing the sampled voltage with the adjustable comparator's reference voltage, wherein reference voltages for the plurality of adjustable comparators are computed based on a main cursor and at least one pre-cursor associated with the communication channel, and wherein each generated reference voltage corresponds to a particular sequence of symbols;
- and
- a sequence-selection circuit to select a sequence of symbols based on the result signals outputted by the plurality of adjustable comparators, wherein the sequence-selection circuit selects the sequence of symbols from a set of 2M possible sequences based on a set of previously detected symbols, wherein M is the number of symbols in the set of previously detected symbols, wherein each possible sequence in the set of 2M possible sequences includes the set of previously detected symbols, a current symbol, and one or more future symbols.
1 more element
A receiver in a communication system, the receiver comprising:
- an input port to receive an input signal over a communication channel;
- a sample-and-hold circuit to sample the input signal based on a clock signal, and to output a sampled voltage for at least a holding period;
- a plurality of adjustable comparators, wherein each adjustable comparator has a respective reference voltage that is adjustable, wherein each adjustable comparator outputs a result signal based on comparing the sampled voltage with the adjustable comparator's reference voltage, wherein reference voltages for the plurality of adjustable comparators are computed based on a main cursor and at least one pre-cursor associated with the communication channel, and wherein each generated reference voltage corresponds to a particular sequence of symbols;
- and
- a sequence-selection circuit to select a sequence of symbols based on the result signals outputted by the plurality of adjustable comparators, wherein the sequence-selection circuit selects the sequence of symbols from a set of 2M possible sequences based on a set of previously detected symbols, wherein M is the number of symbols in the set of previously detected symbols, wherein each possible sequence in the set of 2M possible sequences includes the set of previously detected symbols, a current symbol, and one or more future symbols.
2 more elements
A method for sequence detection, comprising:
- receiving an input signal over a communication channel;
- sampling the input signal based on a clock signal to obtain a sampled voltage;
- generating a first set of reference voltages based on a main cursor and at least one pre-cursor associated with the communication channel, wherein each generated reference voltage in the first set of reference voltages corresponds to a particular sequence of symbols;
- and
- selecting, by using a sequence-selection circuit, a sequence of symbols corresponding to the sampled voltage based on comparing the sampled voltage with the first set of reference voltages, wherein the sequence of symbols is selected from a set of 2M possible sequences based on a set of previously detected symbols, wherein M is the number of symbols in the set of previously detected symbols, wherein each possible sequence in the set of 2M possible sequences includes the set of previously detected symbols, a current symbol, and one or more future symbols.
2 more elements
Dependencies are inferred from the claim text.