Current source logic gate
AssigneeThe United States of America as represented by the Administrator of the National Aeronautics and Space Administration
InventorsMichael J. Krasowski, Norman F. Prokop
Life of this patent
Estimating the term…
Abstract
A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.
Claims20
An apparatus configured to create digital logic gates, comprising:
- a first N channel depletion mode field effect transistor (“first transistor”) with gate, source, and drain terminals, wherein the gate terminal acts as an input to the apparatus;
- and
- a second N channel depletion mode field effect transistor (“second transistor”) with gate, source, and drain terminals, configured as a current source, wherein
- the drain terminal of the second transistor is tied to a positive voltage relative to ground,
- the source terminal of the first transistor tied to ground and the drain terminal of the first transistor tied through a first resistor to the source terminal of the second transistor and directly to the gate terminal of the second transistor,
- and
- the drain of the first transistor is further tied to a second resistor in series with a third resistor, a remaining lead of the third resistor is tied to a negative voltage relative to ground, and a node common to the second and third resistors is the output of the apparatus.
A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors, comprising:
- a current source comprising a transistor and a current source resistor;
- a current steering switch input stage comprising a transistor to steer current to set an output stage bias point depending on an input logic signal state;
- and
- a resistor divider level shifting output stage comprising a first resistor and a second resistor to set the output stage point and produce valid output logic signal states, wherein
- the transistor of the current steering switch input stage functions as a switch to provide at least two operating points.
A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors, comprising:
- a first N channel depletion mode FET (“first transistor”) with gate, source, and drain terminals;
- and
- a second N channel depletion mode FET (“second transistor”) with gate, source, and drain terminals, wherein
- the first transistor is configured to act as a current source, and is positioned above the second transistor,
- the drain terminal of the first transistor is tied to a positive voltage relative to ground,
- the gate terminal of the second transistor acts as an input to the current source logic gate,
- the source terminal of the second transistor is tied to ground, and the drain terminal of the second transistor is tied through a first resistor to the source terminal of the first transistor and directly to the gate terminal of the first transistor, and
- the drain of the second transistor is further tied to a second resistor in series with a third resistor, a remaining lead of the third resistor is tied to a negative voltage relative to ground, and a node common to the second and third resistors is the output of the current source logic gate.
Dependencies are inferred from the claim text.