High power radio frequency amplifier with dynamic digital control

A method of controlling the output power of an RF power amplifier comprising:

• A. inputting an RF input signal to a directional coupler device, which does not affect the RF input signal, which is adapted to detect a signal envelope of the RF input signal and output an analog signal to a first analog/digital converter, whereby first analog/digital converter thereafter outputs a digital envelope signal, and outputs another analog signal to an edge trigger device, which outputs a digital edge trigger signal;
• B. inputting the digital envelope signal and the edge trigger signal to a digital processor, which comprises a microprocessor, memory and an operation control program which controls general operation of the digital processor, which further comprises a control algorithm and its associated stored data;
• C. the RF power amplifier receives the output of the directional coupler device and acts upon it with an input stage and an output stage, the output stage comprising a power FET having gate and drain terminals, whereupon the RF power amplifier acts upon the RF input signal from the directional coupler to output an amplified RF output signal;
• D. the amplified RF output signal passes through a reflectometer device without affecting the amplified RF output signal, detection of an edge of the RF input signal, an edge trigger signal and envelope signal are generated and input to the digital processor, whereupon reflectometer device outputs first detector signals comprising forward going portion of the amplified RF output signal and outputs second detector signals comprising reflected components of the amplified RF output signal, each of which output signals are transformed to digital forms at separate analog to digital converters and thereafter input to the digital processor;
• and
• E. the digital processor acts upon inputs by way of the control algorithm to output a digital amplifier signal, which is converted to analog form and input to the gate terminal of a power FET of the output stage, and a further output of a digital DC signal, which is converted to a direct current signal and input to the drain terminal of a power FET of the output stage.