Methods of making memory devices with programmable impedance elements and vertically formed access devices
AssigneeAdesto Technologies Corporation
InventorIshai Naveh
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Abstract
A method can include forming a plurality of access transistors, including forming second semiconductor regions over an integrated circuit substrate that are doped to a second conductivity type, the second semiconductor regions being over and in contact with first semiconductor regions doped to a first conductivity type, and forming third semiconductor regions doped to the first conductivity type in contact with the second semiconductor regions; forming a plurality of conductive structures, over and in contact with the third semiconductor regions; and forming programmable impedance memory cells over and in contact with the conductive structures.
Claims9
A method, comprising:
- forming a plurality of access transistors, including
- forming second semiconductor regions over an integrated circuit substrate that are doped to a second conductivity type, the second semiconductor regions being over and in contact with first semiconductor regions doped to a first conductivity type, and
- forming third semiconductor regions doped to the first conductivity type in contact with the second semiconductor regions;
- forming a plurality of conductive structures, over and in contact with the third semiconductor regions;
- and
- forming programmable impedance memory cells over and in contact with the conductive structures.
Dependencies are inferred from the claim text.