Semiconductor device and a manufacturing method thereof
AssigneeRenesas Electronics Corporation
InventorAtsushi Amo
Life of this patent
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Abstract
In a semiconductor device including a split gate type MONOS memory, and a trench capacitor element having an upper electrode partially embedded in trenches formed in the main surface of a semiconductor substrate, merged therein, the flatness of the top surface of the upper electrode embedded in the trench is improved. The polysilicon film formed over the semiconductor substrate to form a control gate electrode forming a memory cell of the MONOS memory is embedded in the trenches formed in the main surface of the semiconductor substrate in a capacitor element formation region, thereby to form the upper electrode including the polysilicon film in the trenches.
Claims16
A method for manufacturing a semiconductor device, comprising:
- (a) providing a semiconductor substrate having a first region and a second region arranged along a main surface;
- (b) forming a first trench in the main surface of the semiconductor substrate in the second region;
- (c) covering a sidewall and a bottom surface of the first trench with a first insulation film;
- (d) after (c), forming a first conductor film over the main surface of the semiconductor substrate in the first region and the second region, and thereby embedding the first conductor film in the first trench via the first insulation film;
- (e) processing the first conductor film in the first region to form a control gate electrode comprised of the first conductor film;
- (f) after (e), forming a memory gate electrode adjacent to a sidewall of the control gate electrode via a second insulation film, the second insulation film having a charge accumulation part therein;
- (g) processing the first conductor film in the second region to form a first electrode comprised of the first conductor film embedded in the first trench;
- and
- (h) after (f), forming a pair of first source/drain regions in the main surface of the semiconductor substrate in the first region,
- wherein the control gate electrode, the memory gate electrode, and the pair of first source/drain regions form a memory cell of a nonvolatile memory, and
- wherein the first electrode and the semiconductor substrate under the first electrode form a capacitor element.
Dependencies are inferred from the claim text.