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US 9,755,069 B2Granted
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorHiroki Fujii
Life of this patent
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Abstract
There is provided a semiconductor device having LDMOS transistors embedded in a semiconductor substrate to boost source-drain breakdown voltage, with arrangements to prevent fluctuations of element characteristics caused by electric field concentration so that the reliability of the semiconductor device is improved. A trench is formed over the upper surface of a separation insulating film of each LDMOS transistor, the trench having a gate electrode partially embedded therein. This structure prevents electric field concentration in the semiconductor substrate near the source-side edge of the separation insulating film.
Claims13
A semiconductor device comprising:
- a semiconductor substrate;
- a source region of a first conductivity type paired with a drain region of the first conductivity type, the source region and the drain region disposed over a principal plane of the semiconductor substrate;
- a separation insulating film embedded in an isolation trench formed over the principal plane of the semiconductor substrate between the source region and the drain region;
- a gate insulating film disposed over the semiconductor substrate between the separation insulating film and the source region;
- a gate electrode disposed in a manner extending immediately above the gate insulating film and immediately above the separation insulating film between the source region and the drain region;
- a drift region of the first conductivity type disposed in the semiconductor substrate under the separation insulating film, one edge of the drift region being located immediately under the gate insulating film;
- and
- a plurality of trenches disposed over the upper surface of the separation insulating film, each of the plurality of the trenches having the gate electrode partially embedded therein,
- wherein the interval between the gate electrode and the drain region is longer than the interval between the gate electrode and the source region;
- wherein a trench of the plurality of trenches that is closest to the source region is located away from an edge of the separation insulating film on the source region side of the separation insulating film, and a trench of the plurality of trenches that is closest to the drain region is disposed away from an edge of the gate electrode that is on the drain region side,
- wherein a bottom of each of the plurality of trenches is positioned halfway through the depth of the separation insulating film, and
- wherein the separation insulating film has a structure made of a plurality of layered insulating films.
9 more elements
A semiconductor device comprising:
- a semiconductor substrate;
- a source region of a first conductivity type paired with a drain region of the first conductivity type, the source region and the drain region disposed over a principal plane of the semiconductor substrate;
- a separation insulating film embedded in an isolation trench formed over the principal plane of the semiconductor substrate between the source region and the drain region;
- a gate insulating film disposed over the semiconductor substrate between the separation insulating film and the source region;
- a gate electrode disposed in a manner extending immediately above the gate insulating film and immediately above the separation insulating film between the source region and the drain region;
- a drift region of the first conductivity type disposed in the semiconductor substrate under the separation insulating film, one edge of the drift region being located immediately under the gate insulating film;
- and
- a trench disposed over the upper surface of the separation insulating film, the trench having the gate electrode partially embedded therein,
- wherein the interval between the gate electrode and the drain region is longer than the interval between the gate electrode and the source region;
- wherein the trench is located away from an edge of the separation insulating film on the source region side of the separation insulating film, and the trench is disposed away from an edge of the gate electrode that is on the drain region side,
- wherein the bottom of the trench is positioned halfway through the depth of the separation insulating film,
- wherein the separation insulating film has a structure made of a plurality of layered insulating films, and
- wherein the first conductivity type is an N-type conductivity.
10 more elements
Dependencies are inferred from the claim text.