US 9,755,062 B2Granted

III-N material structure for gate-recessed transistors

AssigneeIntel Corporation

InventorsHan Wui Then, Marko Radosavljevic, Uday Shah, Niloy Mukherjee, Ravi Pillarisetty, Benjamin Chu-Kung, Jack T. Kavalieros, Robert S. Chau

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Abstract

III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the source/drain layer and a III-N channel layer. An etch process, e.g., utilizing photochemical oxidation, selectively etches the source/drain layer over the etch stop layer. A gate electrode is disposed over the etch stop layer to form a recessed-gate III-N HEMT. At least a portion of the etch stop layer may be oxidized with a gate electrode over the oxidized etch stop layer for a recessed gate III-N MOS-HEMT including a III-N oxide. A high-k dielectric may be formed over the oxidized etch stop layer with a gate electrode over the high-k dielectric to form a recessed gate III-N MOS-HEMT having a composite gate dielectric stack.

Claims20

Dependent claims

A III-N transistor comprising:

a III-N semiconductor channel layer disposed over a substrate;
a III-N semiconductor barrier layer disposed over the channel layer, the barrier layer having a larger band gap than that of the channel layer;
a III-N semiconductor material layer disposed over the barrier layer;
an oxide layer of the III-N semiconductor material layer disposed on a first portion of the III-N semiconductor material layer;
a gate electrode disposed above the oxide layer of the III-N semiconductor material layer;
III-N semiconductor source and drain regions disposed at opposite sides of the gate electrode, the III-N semiconductor source and drain regions disposed directly on second portions of the III-N semiconductor material layer;
and
an oxide layer of the III-N semiconductor source and drain regions at opposite sides of the gate electrode, the oxide layer of the III-N semiconductor source and drain regions laterally separating the gate electrode and the III-N semiconductor source and drain regions.

5 more elements

A method of forming a III-N transistor, the method comprising:

etching a trench in a III-N semiconductor material layer formed directly on a III-N semiconductor barrier layer different from the III-N semiconductor material layer, wherein the etching terminates on and exposes a first portion of the III-N semiconductor barrier layer at the bottom of the trench, and wherein the III-N semiconductor barrier layer is formed over a III-N semiconductor channel layer formed over a substrate;
oxidizing at least a partial thickness of the exposed first portion of the III-N semiconductor barrier layer and at least sidewalls of the III-N semiconductor material layer exposed in the trench to form an oxide layer of the III-N semiconductor barrier layer at the bottom of the trench and to form an oxide layer of the III-N semiconductor material layer along sidewalls of the trench;
forming a gate electrode above the oxide layer of the III-N semiconductor barrier layer and laterally between the oxide layer of the III-N semiconductor material layer along sidewalls of the trench;
and
forming III-N semiconductor source and drain regions in the III-N semiconductor material layer, on opposite sides of the gate electrode.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/389,255Filed 22 Dec 2016 · continuation
Priority: 24 Feb 2015
Published: US 2017/0104094 A113 Apr 2017
Granted: 5 Sep 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification21 codes

H10D 30/4755
Having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs: having wide bandgap…
H10D 30/015
Manufacture or treatment: of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
H10D 62/605
Impurity distributions or concentrations: planar doped, e.g. atomic-plane doped or delta-doped
H10D 62/824
Heterojunctions: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions

Family

PCT/US2011/067220Parent of this continuation · filed 23 Dec 2011
Application14/630,541Parent of this continuation · filed 24 Feb 2015
US 8,987,091 B2Parent of this continuation · filed 24 Mar 2015
Application14/935,346Parent of this continuation · filed 6 Nov 2015
US 9,209,290 B2Parent of this continuation · filed 8 Dec 2015
US 2017/0104094 A1Pre-grant publication · published 13 Apr 2017
US 9,530,878 B2Parent of this continuation
Application13/976,840Parent of this continuation
US 2013/0292698 A1Published application
US 2015/0171205 A1Published application
US 2016/0064540 A1Published application
US 9,755,062 B2This patent

From the US filing history. Foreign family members aren’t listed.