Method for reduced source and drain contact to gate stack capacitance
AssigneeInternational Business Machines Corporation
InventorsCarl John Radens, Richard Quimby Williams
Life of this patent
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Abstract
A structure and method for fabricating a semiconductor device is described. A device structure including a gate structure, a source region and a drain region is disposed on a first surface of a substrate. Contact holes are etched through the source and drain regions and through a first portion of the substrate. The contact holes are filled with a conductive material to produce contact studs coupled to the source and drain regions. A second portion of the substrate is removed. A surface of the contact studs is exposed through a second surface of the substrate opposite to the gate structure for connection to a wiring layer disposed over the second surface of the substrate.
Claims15
A method for fabricating a semiconductor device comprising:
- providing a device structure including a gate structure, source and drain regions disposed on a first surface of a substrate;
- etching respective contact holes first through an entire thickness of the source and drain regions disposed on the first surface of the substrate and then continuing etching through a first portion of the substrate underlying the source and drain regions;
- filling the contact holes with a conductive material to produce contact studs respectively through the entire thickness of the source and drain regions;
- and
- removing a second portion of the substrate to expose a surface of the contact studs on a second surface of the substrate opposite to the gate structure.
A method for fabricating a semiconductor device comprising:
- etching contact holes first through an entire thickness of the source and drain regions of a device structure and then continuing etching through a first portion of a substrate, wherein a gate structure and the source and drain regions of the device structure are disposed on a first surface of the substrate;
- filling the contact holes with a conductive material to produce contact studs respectively through the entire thickness of the source and drain regions;
- attaching a handling wafer to the first surface of the substrate;
- removing a second portion of substrate material from a second surface of the substrate to expose a surface of the contact studs, wherein the second surface of the substrate and the exposed surface of the contact studs are opposite to the first surface;
- and
- depositing a metallization wiring layer over the exposed surface of the contact studs, wherein the metallization layer is disposed over the second surface.
Dependencies are inferred from the claim text.