Co-integration of silicon and silicon-germanium channels for nanosheet devices

A method for forming nanosheet semiconductor devices, comprising:

• forming a first nanosheet stack in a first device region comprising alternating layers of silicon and layers silicon germanium having a germanium concentration of about 50%;
• forming a second nanosheet stack in a second device region comprising layers of silicon germanium having a germanium concentration of about 30%, layers of silicon germanium having a germanium concentration of about 50%, and a silicon liner formed around the layers of silicon germanium having a germanium concentration of about 30%;
• etching away the sacrificial material with a wet etch that is selective to the silicon germanium layers and does not affect the silicon layers or the silicon liner, wherein the silicon liner protects the layers silicon germanium having a germanium concentration of about 30% from the etch;
• and
• forming gate stacks over and around the layers of silicon and the layers of silicon germanium having a germanium concentration of about 30% to form respective first and second semiconductor devices in the first and second device regions.

An integrated chip, comprising:

• a first semiconductor device comprising a plurality of first nanosheet channel layers of a first semiconductor material;
• a second semiconductor device comprising a plurality of second nanosheet channel layers of a second semiconductor material and a liner formed around the second nanosheet channel layers;
• gate stacks formed over and around the first and second nanosheet channel layers respectively;
• and
• a vertical liner on sidewalls of the gate stack that is over the second nanosheet channel layers.