Non-volatile semiconductor devices

A semiconductor device, comprising:

• a substrate;
• a plurality of insulating interlayers and a plurality of gate lines disposed on the substrate,
• wherein each insulating interlayer and each gate line are alternately and repeatedly stacked on the substrate;
• a plurality of channel holes penetrating through the insulating interlayers and the gate lines;
• a charge trap layer disposed on a sidewall of each channel hole;
• a tunnel insulation layer disposed on the charge trap layer, the tunnel insulation layer including:
• a first silicon oxide layer;
• a second silicon oxide layer;
• and
• a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer, the silicon layer having a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer;
• and
• a plurality of channels, each of which is disposed on the tunnel insulation layer and in the each channel hole.