Charge storage apparatus and methods

A memory system comprising:

• a plurality of charge storage structures, wherein each charge storage structure at least partially surrounds a vertical opening in a semiconductor construction, and wherein each charge storage structure is separated from an adjacent charge storage structure by a first dielectric, wherein the plurality of charge storage structures comprise:
• a second dielectric on each charge storage structure in the opening;
• silicon on the second dielectric in the vertical opening, wherein the second dielectric separates the charge storage structures from the silicon;
• and
• a third dielectric on each charge storage structure,
• wherein the silicon in the vertical opening comprises silicon formed in a U-shaped pipe, wherein a portion of the U-shaped pipe comprises the vertical opening.

A memory system comprising:

• a plurality of charge storage structures arranged vertically relative to one another, each charge storage structure comprising doped silicon, the charge structures separated by respective tiers of dielectric material;
• a tunneling dielectric on a first surface of each of the plurality of charge storage structures;
• a silicon film extending on the opposite side of the tunneling dielectric from the charge storage structures, the silicon film forming a channel for the charge storage structures;
• a respective intergate dielectric on a second surface of each of the plurality of charge storage structures on the side opposite the second dielectric;
• and
• a respective metal gate at least partially surrounding each charge storage structure;
• wherein each respective intergate dielectric has a vertical dimension greater than the vertical dimensions of both the charge storage structure and the metal gate.

A memory system comprising:

• a U-shaped channel formed in a plurality of tiers of semiconductor material alternating with a plurality of tiers of dielectric material, the U-shaped channel comprising vertical pipe channels, the U-shaped channel lined with a first dielectric material;
• a vertical slot formed in the plurality of tiers of semiconductor material alternating with the plurality of tiers of dielectric material and between the vertical pipe channels, the vertical slot lined with a silicon nitride liner, a dielectric material filling the vertical slot between the silicon nitride liner;
• a plurality of charge storage structures formed in recesses in each tier of semiconductor material, each charge storage structure formed between the vertical slot and the vertical pipe channels, each charges storage structure separated from one of vertical pipe channels by a ring of polysilicon surrounding the vertical pipe channels, each charge storage structure comprising:
• an oxide-nitride-oxide structure lining each recess;
• and
• a metal gate formed within the oxide-nitride-oxide structure.