Stacked semiconductor apparatus, system and method of fabrication

Electronics comprising:

• a plurality of semiconductor devices stacked vertically one atop the other,
• each of the semiconductor devices comprising a substrate having a front-side and a back-side, a circuit configured by circuit components, and an electrically conductive pattern including a first inter-device connection element disposed on the front-side of the substrate, a first back-side connection element disposed on the back-side of the substrate, and a first vertical connection element extending through the substrate,
• the first inter-device connection element and the first vertical connection element each being electrically conductively connected to the circuit, and the first back-side connection element being electrically conductively connected to the first vertical connection element such that the circuit is electrically conductively connected to the back-side connection element via the first vertical connection element, and
• wherein the electrically conductive patterns of the semiconductor devices are substantially the same,
• for each lower one of the semiconductor devices and an upper one of the devices stacked directly thereon, the first inter-device connection element of the lower semiconductor device is electrically conductively connected to the first back-side connection element of the upper semiconductor device,
• the circuits of the lower and upper semiconductor devices are electrically connected in series along a first conductive path that extends serially from the first vertical connection element of the lower semiconductor device to one point along the circuit of the lower semiconductor device, then from another point along the circuit of the lower semiconductor device to the first inter-device connection element of the lower semiconductor device, then from the first inter-device connection element of the lower semiconductor device to the first back-side connection element of the upper semiconductor device, then from the first back-side connection element of the upper semiconductor device to the first vertical connection element of the upper semiconductor device, and then from the first vertical connection element of the upper semiconductor device to one point along the circuit of the upper semiconductor device, and
• the vertical connection elements of the semiconductor devices are centrally aligned with one another along a first vertical line, and the back-side connection elements of the semiconductor devices are centrally aligned with one another along a second vertical line that is spaced from the first vertical line.