Semiconductor device and method of manufacturing the same

A method of manufacturing a semiconductor device comprising the following steps of:

• (a) providing a wiring board having an upper surface, a plurality of first bonding leads formed along a first upper surface side of the upper surface, a plurality of second bonding leads formed along a second upper surface side facing the first upper surface side of the upper surface, a lower surface opposite the upper surface, and a plurality of bump lands formed on the lower surface, a shape in a plan view of the upper surface being that of a quadrangle;
• (b) after step (a), mounting a first semiconductor chip on the upper surface of the wiring board, the first semiconductor chip having a main surface, a plurality of first main surface side pads formed along a first main surface side of the main surface, a plurality of second main surface side pads formed along a second main surface side facing the first main surface side of the main surface, and a rear surface opposite the main surface, the first semiconductor chip being configured to perform both interface control of high-frequency contactless communication and data processing of communication data, the first semiconductor chip being mounted such that the rear surface of the first semiconductor chip faces the upper surface of the wiring board, and such that the first and second main surface sides are aligned with the first and second upper surface sides, respectively, in the plan view, and such that each of the first bonding leads and the second boding leads is exposed from the first semiconductor chip, a shape in a plan view of the main surface being that of a quadrangle;
• (c) after step (b), mounting a second semiconductor chip on the main surface of the first semiconductor chip, the second semiconductor chip having a front surface, a plurality of first front surface side pads formed along a first front surface side of the front surface, and a back surface opposite the front surface, the second semiconductor chip being configured to perform another data processing of the communication data, the second semiconductor chip being mounted such that the back surface faces the main surface of the first semiconductor chip, and such that the first front surface side is aligned with the first main surface side, respectively, in the plan view, and such that each of the first main surface side pads and the second main surface side pads is exposed, a shape in a plan view of the front surface being that of a quadrangle;
• and
• (d) after step (c), electrically connecting the first main surface side pads with a first lead group of the first bonding leads via a plurality of first wires, the second main surface side pads with the second bonding leads via a plurality of second wires, and the first front surface side pads and a second lead group of the first bonding leads via a plurality of third wires,
• wherein the first semiconductor chip includes pads which are formed only along the first and second main surface sides of the main surface,
• wherein the second semiconductor chip includes pads which are formed only along the first front surface side of the front surface,
• wherein the data processing by the first semiconductor chip includes receiving communication data of first, second, and third modulation modes, processing the communication data of the first and second modulation modes, and transmitting the communication data of the third modulation mode to the second semiconductor chip,
• wherein the another data processing by the second semiconductor chip includes processing the communication data of the third modulation mode received from the first semiconductor chip and transmitting the processed communication data of the third modulation mode to the first semiconductor chip,
• wherein the first semiconductor chip is further configured to perform transmission of the processed communication data of the first, second, and third modulation modes,
• wherein the first main surface side pads in the first semiconductor chip include both a plurality of first pads each for externally outputting a high-frequency transmission current signal and a plurality of second pads each for inputting a high-frequency receiving current signal from the outside,
• wherein the plurality of first pads are arranged in a first circuit region of the first main surface side, and the plurality of second pads are arranged in a second circuit region of the first main surface side,
• wherein, in plan view, a surface area of the first circuit region is larger than a surface area of the second circuit region, and
• wherein the first pads are arranged closer to the second main surface side than the other pads of the first main surface side pads.

A semiconductor device comprising:

• a wiring board having a plurality of bonding leads along a first side thereof;
• a first semiconductor chip that has a plurality of pads along a first side thereof which is adjacent to the first side of the wiring board, and that is mounted on the wiring board such that each of the bonding leads is exposed, and is configured to perform both interface control of high-frequency contactless communication and data processing of communication data;
• and
• a second semiconductor chip that has a plurality of pads along a side thereof which is adjacent the first side of the first semiconductor chip, and that is mounted on the first semiconductor chip such that each of the pads of the first semiconductor chip is exposed, and is configured to perform another data processing of the communication data,
• wherein the data processing by the first semiconductor chip includes receiving communication data of first, second, and third modulation modes, processing the communication data of the first and second modulation modes, and transmitting the communication data of the third modulation mode to the second semiconductor chip,
• wherein the another data processing by the second semiconductor chip includes processing the communication data of the third modulation mode received from the first semiconductor chip and transmitting the processed communication data of the third modulation mode to the first semiconductor chip,
• wherein the first semiconductor chip is further configured to perform transmission of the processed communication data of the first, second, and third modulation modes,
• wherein the pads of the first semiconductor chip and a first lead group of the bonding leads are respectively and electrically connected by a plurality of first wires,
• wherein the pads of the second semiconductor chip and a second lead group of the bonding leads are respectively and electrically connected by a plurality of second wires,
• wherein the pads of the first semiconductor chip include a plurality of first pads each for externally outputting a high-frequency transmission current signal and a plurality of second pads each for inputting a high-frequency receiving current signal from the outside,
• wherein of the pads in the first semiconductor chip, the first pads are arranged at positions farther from the first side of the first semiconductor chip than the second pads, and
• wherein the second semiconductor chip is mounted on the first semiconductor chip by being biased, along the first side of the first semiconductor chip, in a direction away from the first pads.