Final passivation for wafer level warpage and ULK stress reduction

A method for forming a semiconductor device, the method comprising:

• forming a contacting layer on a surface of a silicon nitride layer and a via in a dielectric stack comprising a nitrogen-doped silicon carbide layer, the silicon nitride layer, and a silicon oxide layer positioned between the nitrogen-doped silicon carbide layer and the silicon nitride layer;
• forming a first dielectric layer on a surface of the contacting layer and on a surface of the silicon nitride layer;
• removing a first portion of the first dielectric layer, thus patterning an opening in the first dielectric layer having a shape defined by an inner circular wall and an outer circular wall, the inner circular wall and the outer circular wall being concentric with each other;
• filling the opening with a photosensitive polyimide (PSPI);
• removing a second portion of the first dielectric layer, thus exposing a surface of the contacting layer;
• forming a barrier layer metallurgy (BLM) pad on the surface of the contacting layer and over portions of the opening such that portions of the BLM pad are in contact with portions of the PSPI;
• forming a conductive pedestal on a surface of the BLM pad;
• and
• forming a solder bump on a surface of the conductive pedestal.