Double sided NMOS/PMOS structure and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJam-Wem Lee
Life of this patent
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Abstract
A chip includes a dielectric layer having a top surface and a bottom surface, a first semiconductor layer overlying and bonded to the top surface of the dielectric layer, and a first Metal Oxide-Semiconductor (MOS) transistor of a first conductivity type. The first MOS transistor includes a first gate dielectric overlying and contacting the first semiconductor layer, and a first gate electrode overlying the first gate dielectric. A second semiconductor layer is underlying and bonded to the bottom surface of the dielectric layer. A second MOS transistor of a second conductivity type opposite to the first conductivity type includes a second gate dielectric underlying and contacting the second semiconductor layer, and a second gate electrode underlying the second gate dielectric.
Claims20
A method comprising:
- forming a first transistor at a top surface of a Semiconductor-On-Insulator (SOI) substrate, wherein the SOI substrate comprises:
- a dielectric layer;
- a first semiconductor layer;
- a second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are bonded to opposite surfaces of the dielectric layer, and the first transistor is formed on the second semiconductor layer;
- thinning the first semiconductor layer;
- forming a second transistor on the first semiconductor layer, wherein the first transistor and the second transistor are of opposite conductivity types;
- and
- forming a through-via penetrating through the first semiconductor layer, the dielectric layer, and the second semiconductor layer.
A method comprising:
- thinning a first semiconductor layer in a Semiconductor-On-Insulator (SOI) substrate, wherein the SOI substrate comprises:
- the first semiconductor layer;
- a dielectric layer having a first surface bonded to the first semiconductor layer, wherein the dielectric layer is a continuous layer with no distinguishable interface therein;
- and
- a second semiconductor layer bonded to a second surface of the dielectric layer;
- forming a first transistor and a second transistor on the first semiconductor layer and the second semiconductor layer, respectively;
- and
- forming a through-via penetrating through the first semiconductor layer, the dielectric layer, and the second semiconductor layer, wherein the through-via electrically couples the first transistor to the second transistor.
A method comprising:
- forming first isolation regions in a first semiconductor layer of a Semiconductor-On-Insulator (SOI) substrate, wherein the SOI substrate comprises:
- a dielectric layer;
- a first semiconductor layer;
- a second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are bonded to opposite surfaces of the dielectric layer, wherein the first isolation regions penetrate through the first semiconductor layer to contact the dielectric layer;
- forming second isolation regions penetrating through the second semiconductor layer to contact the dielectric layer;
- forming a through-via penetrating through the dielectric layer, a first one of the first isolation regions, and a second one of the second isolation regions;
- forming a first transistor on the first semiconductor layer;
- and
- forming a second transistor on the second semiconductor layer, wherein the first transistor and the second transistor are of opposite conductivity types, and the first semiconductor layer and the second semiconductor layer have different surface orientations.
Dependencies are inferred from the claim text.