Back to results
US 9,754,832 B2Granted
Semiconductor wafer and method of producing the same
AssigneeNXP B.V.
InventorsFlorian Schmitt, Heimo Scheucher, Michael Ziesmann
Life of this patent
Estimating the term…
Abstract
A semiconductor wafer (100) having a regular pattern of predetermined separation lanes (102) is provided, wherein the predetermined separation lanes (102) are configured in such a way that the semiconductor wafer is singularizable along the regular pattern.
Claims19
A semiconductor wafer comprising:
- a substrate;
- and
- a metal or polycrystalline silicon layer and a regular pattern of separation lanes including a dielectric material on a front side of the substrate,
- wherein the separation lanes further include ions implanted into portions of the substrate, the ions extending through the substrate from a back side of the semiconductor wafer to the dielectric material and terminating at the dielectric material, to define a weakened portion of the substrate in the separation lanes, the weakened portion being configured to facilitate singulation along the regular pattern and to prevent imperfect die edges during laser separation, and
- wherein the separation lanes are lanes between chip areas and the separation lanes are substantially free, on both the back side and the front side of the wafer, of metal or polycrystalline silicon throughout the dielectric material on the substrate.
2 more elements
A method of producing a wafer having chip areas including a layer containing metal or polycrystalline silicon and a regular pattern of separation lanes between the chip areas, the method comprising:
- providing an unpatterned semiconductor wafer including a substrate and a dielectric material on a front side of the substrate, and
- forming regular pattern of separation lanes by implanting ions via a back side of the wafer into silicon material of the substrate under the dielectric material and along lanes that extend between the chip areas of the semiconductor wafer to define, weaken and configure the separation lanes to singularize along the regular pattern and to prevent imperfect die edges during laser separation, the ions extending from a back side of the substrate to the dielectric material,
- wherein the separation lanes are substantially free of the metal or polycrystalline silicon throughout the dielectric material on the substrate.
An apparatus comprising:
- a semiconductor wafer including a silicon substrate and chip areas including metal or polycrystalline silicon separated by a regular pattern of separation lanes including a dielectric material on a front side of the silicon substrate, wherein the separation lanes are substantially free of the metal or polycrystalline silicon throughout the dielectric material on the silicon substrate,
- wherein the separation lanes include ions implanted into portions of the silicon substrate of the semiconductor wafer to define the separation lanes, extending between the chip areas from a back side of the silicon substrate and terminating at the dielectric material, the ions being configured and arranged to weaken the silicon substrate along the separation lanes to facilitate singularizing of the wafer along the regular pattern and to prevent imperfect die edges during laser separation, and
- a supporting frame configured and arranged to expand the semiconductor wafer sufficient to separate chips along the regular pattern of the separation lanes.
Dependencies are inferred from the claim text.