Semiconductor transistor device and fabrication method thereof
AssigneeUnited Microelectronics Corp.
InventorsZhibiao Zhou, Ding-Lung Chen, Xing Hua Zhang
Life of this patent
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Abstract
A semiconductor transistor device includes a substrate having an active area and a trench isolation region surrounding the active area, a gate oxide layer, a gate, a spacer on a sidewall of the gate, a doping region on one side of the gate, an insulating cap layer covering the gate, the spacer and the doping region, and a redistributed contact layer (RCL) on the insulating cap layer. The RCL extends from the active area to the trench isolation region. A contact plug is disposed above the trench isolation region and is electrically connected to the gate or the doping region through the RCL.
Claims12
A semiconductor transistor device, comprising:
- a semiconductor substrate having an active area and a trench isolation region surrounding the active area;
- a gate oxide layer disposed on the active area;
- a gate disposed on the gate oxide layer;
- a spacer disposed on a sidewall of the gate;
- a source doping region disposed in the active area on one side of the gate;
- a drain doping region disposed in the active area on the other side of the gate;
- an insulating cap layer covering the gate, the spacer, the source doping region and the drain doping region;
- a redistributed contact layer (RCL) on the insulating cap layer, wherein the RCL is in direct contact with at least one of the gate, the source doping region and the drain doping region, and extends from the active area to the trench isolation region;
- and
- a contact plug directly disposed on the RCL vertically above the trench isolation region and is electrically connected to at least one of the gate, the source doping region and the drain doping region through the RCL.
Dependencies are inferred from the claim text.