Interconnect structure and method

A method comprising:

• depositing a first dielectric layer having a first thickness over a conductive element over a substrate;
• performing a plasma treatment process to convert a top portion of the first dielectric layer into an insert layer, the insert layer having a K-value that is greater than the first dielectric layer, wherein after the plasma treatment process, a remaining lower portion of the first dielectric layer has a second thickness less than the first thickness;
• depositing a second dielectric layer over the insert layer, the second dielectric layer having a K-value that is less than the insert layer;
• etching the second dielectric layer, the insert layer, and the first dielectric layer to form a via opening exposing the conductive element over the substrate;
• and
• etching the second dielectric layer to form a trench opening overlapping the via opening, the trench opening having a greater width than the via opening, a first portion of the second dielectric layer being interposed between a bottom surface of the trench opening and a top surface of the insert layer.

A method comprising:

• forming a fin extending from a substrate;
• forming an isolation regions surrounding the fin;
• forming a gate structure on a top surface and sidewalls of the fin;
• forming a source region and a drain region on the fin, the gate structure being interposed between the source region and the drain region;
• forming an interlayer dielectric over the fin, the source region, the drain region, the isolation region, and the gate structure;
• forming a conductive contact extending through the interlayer dielectric to contact the source region or the drain region;
• depositing a first dielectric layer over interlayer dielectric and the conductive contact;
• forming an insert layer over and in contact with the first dielectric layer, the insert layer having a hardness that is greater than the first dielectric layer and a K-value that is greater than the first dielectric layer;
• depositing a second dielectric layer over and in contact with the insert layer, the second dielectric layer having a hardness that is less than the insert layer and a K-value that is less than the insert layer;
• and
• forming a first conductive interconnect extending through the second dielectric layer, the insert layer, and the first dielectric layer to contact the conductive contact, the first conductive interconnect comprising a via of a first width and a trench of a second width, the trench overlapping the via, the second width being greater than the first width, wherein a bottom surface of the trench is in the first dielectric layer, or is separated from a surface of the insert layer by a first portion of the second dielectric layer.