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US 9,754,677 B2Granted
Semiconductor memory device, memory system including the same, and operating method thereof
AssigneeSK hynix Inc.
InventorJong Won Park
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a memory cell array including a plurality of memory cells, a read and write circuit temporarily storing program data to be programmed into the memory cell array during a program operation, and reading data stored in the memory cell array and temporarily storing read data during a read operation, and a control logic detecting an error in the program operation by comparing the program data with the read data.
Claims17
A semiconductor memory device, comprising:
- a memory cell array including a plurality of memory cells;
- a read and write circuit temporarily storing program data to be programmed into the memory cell array during a program operation, and reading data stored in the memory cell array and temporarily storing read data during a read operation;
- and
- a control logic detecting an error in the program operation by comparing the program data with the read data,
- wherein the control logic detects a data variation by comparing a number of first data bit of the program data to be programmed with a number of the first data bit of the read data, and detects the error in the program operation by comparing the data variation with a predetermined number.
2 more elements
A method of operating a semiconductor memory device, the method comprising:
- counting a number of first data bit of program data inputted during a program operation to store a first counting number;
- programming first memory cells with the program data;
- reading data programmed in the first memory cells;
- counting a number of first data bit of the read data to store a second counting number;
- and
- detecting an error in the program operation by comparing the first counting number with the second counting number.
3 more elements
A memory system, comprising:
- a semiconductor memory device performing a program operation and a read operation on a plurality of memory cells;
- and
- a controller controlling the semiconductor memory device to perform the program operation in response to a program command that is received from a host,
- wherein the controller detects an error in the program operation by comparing program data received during the program operation with read data received after the program operation is completed, from the semiconductor memory device,
- wherein the controller detects a data variation by comparing a number of first data bit of the program data with a number of the first data bit of the read data, and determines that the error exists in the program operation when the data variation is greater than a predetermined number.
2 more elements
Dependencies are inferred from the claim text.