Programming methods and memories

A memory device, comprising:

• control circuitry;
• wherein the control circuitry is configured to boost a channel voltage while a first portion of a plurality of increasing programming pulses is applied to a selected access line;
• wherein the control circuitry is configured, when a criteria is met, to reduce the channel voltage to a reduced voltage level and to subsequently boost the channel voltage, starting from the reduced voltage level, while a second portion of the plurality of increasing programming pulses is applied to the selected access line;
• and
• wherein differences between the channel voltage, when the channel voltage is boosted while the first portion of the plurality of increasing programming pulses is applied to the selected access line, and voltages of the first portion of the plurality of increasing programming pulses are substantially the same as differences between the channel voltage, when the channel voltage is boosted while the second portion of the plurality of increasing programming pulses is applied to the selected access line, and voltages of the second portion of the plurality of increasing programming pulses.

A memory device, comprising:

• control circuitry;
• wherein the control circuitry is configured to boost a channel voltage while a first portion of a plurality of increasing programming pulses is applied to a selected access line, wherein the channel voltage comprises a plurality of increasing first voltages that occur while the first portion of the plurality of increasing programming pulses is applied to the selected access line, wherein a final first voltage of the plurality of increasing first voltages occurs when a final programming pulse of the first portion of the plurality of increasing programming pulses occurs;
• wherein the control circuitry is configured, when a criteria is met, to reduce the channel voltage to a reduced voltage level and to subsequently boost the channel voltage, starting from the reduced voltage level, while a second portion of the plurality of increasing programming pulses is applied to the selected access line, wherein the channel voltage comprises a plurality of increasing second voltages, starting from an initial second voltage of the plurality of increasing second voltages that is at the reduced voltage level, that occur while the second portion of the plurality of increasing programming pulses is applied to the selected access line, wherein the initial second voltage of the plurality of increasing second voltages occurs when an initial programming pulse of the second portion of the plurality of increasing programming pulses occurs;
• wherein differences between the channel voltage, when the channel voltage is boosted while the first portion of the plurality of increasing programming pulses is applied to the selected access line, and voltages of the first portion of the plurality of increasing programming pulses are substantially the same as differences between the channel voltage, when the channel voltage is boosted while the second portion of the plurality of increasing programming pulses is applied to the selected access line, and voltages of the second portion of the plurality of increasing programming pulses;
• wherein the differences between the channel voltage, when the channel voltage is boosted while the first portion of the plurality of increasing programming pulses is applied to the selected access line, and the voltages of the first portion of the plurality of increasing programming pulses comprises a difference between the final first voltage of the plurality of increasing first voltages and a voltage of the final programming pulse of the first portion of the plurality of increasing programming pulses;
• wherein the differences between the channel voltage, when the channel voltage is boosted while the second portion of the plurality of increasing programming pulses is applied to the selected access line, and the voltages of the second portion of the plurality of increasing programming pulses comprises a difference between the initial second voltage of the plurality of increasing second voltages and a voltage of the initial programming pulse of the second portion of the plurality of increasing programming pulses;
• and
• wherein the difference between the final first voltage of the plurality of increasing first voltages and the voltage of the final programming pulse of the first portion of the plurality of increasing programming pulses is substantially the same as the difference between the initial second voltage of the plurality of increasing second voltages and the voltage of the initial programming pulse of the second portion of the plurality of increasing programming pulses.