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US 9,754,670 B1Granted
Semiconductor device having sub-block stack structures
AssigneeSK hynix Inc.
InventorKang Sik Choi
Life of this patent
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Abstract
A semiconductor device includes sub-block stack structures respectively including source layers, where the sub-block stack structures are disposed to be spaced apart from each other along a first direction, a memory block stack structure including word lines stacked over the sub-block stack structures, the word lines being coupled to memory cells, the memory block stack structure extending along the first direction to overlap the sub-block stack structures, and channel layers respectively coupled to the source layers by penetrating the memory block stack structure.
Claims20
A semiconductor device comprising:
- sub-block stack structures respectively including source layers and source select layers, the source select layers coupled to gates of source select transistors, where the sub-block stack structures are disposed to be spaced apart from each other;
- a memory block stack structure including word lines stacked over the sub-block stack structures, the word lines being coupled to memory cells, the memory block stack structure to overlap the sub-block stack structures;
- and
- channel layers respectively coupled to the source layers by penetrating the memory block stack structure,
- wherein the source select layers are electrically separated from each other in an extending direction of the word lines.
2 more elements
A semiconductor device comprising:
- sub-block stack structures disposed to be spaced apart from each other along a first direction, the sub-block stack structures respectively including source layers and source select layers extending along a second direction intersecting the first direction, the source select layers coupled to gates of source select transistors;
- memory block stack structures extending along the first direction to overlap the sub-blocks stack structures, the memory block stack structures being disposed to be spaced apart from each other along the second direction, the memory block stack structures respectively including word lines stacked over the sub-block stack structures, the word lines being coupled to memory cells;
- and
- channel layers respectively coupled to the source layers by penetrating the memory block stack structures,
- wherein each of the word lines and each of the sub-block stack structures cross each other so that the source select layers are electrically separated from each other in an extending direction of the word lines.
2 more elements
Dependencies are inferred from the claim text.