Semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorsHiroki Noguchi, Shinobu Fujita
Life of this patent
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Abstract
A semiconductor memory includes a first block array including first to n-th blocks (n is a natural number of 2 or more) arranged in a first direction, each of the first to n-th blocks including a first memory cell, a first conductive line extending in the first direction, and shared by the first to n-th blocks, first to n-th current amplifiers corresponding to the first to n-th blocks, the i-th current amplifier (i is one of 1 to n) including an input terminal and an output terminal, the input terminal of the i-th current amplifier being electrically connected to the first memory cell in the i-th block, the output terminal of the i-th current amplifier being electrically connected to the first conductive line, and a sense amplifier electrically connected to the first conductive line.
Claims16
A semiconductor memory comprising:
- a first block array including first to n-th blocks (n is a natural number of 2 or more) arranged in a first direction, each of the first to n-th blocks including a first memory cell;
- a first conductive line extending in the first direction, and shared by the first to n-th blocks;
- first to n-th current amplifiers corresponding to the first to n-th blocks, the i-th current amplifier (i is one of 1 to n) including an input terminal and an output terminal, the input terminal of the i-th current amplifier being electrically connected to the first memory cell in the i-th block, the output terminal of the i-th current amplifier being electrically connected to the first conductive line;
- and
- a sense amplifier electrically connected to the first conductive line.
Dependencies are inferred from the claim text.