Semiconductor memory device and data write method thereof

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory cells, each of the memory cells being capable of holding multi-level data;
• and
• a control circuit configured to:
• perform a program cycle including a plurality of program loops, each of the program loops involving a first operation supplying a program voltage and a second operation supplying a verify voltage to a gate of a selected memory cell, the program cycle involving a first phase and a second phase,
• perform a first program loop of the first phase and a second program loop of the second phase in order,
• perform the second operation after performing the first operation in each of the program loops,
• supply a first verify voltage and a second verify voltage in order without supplying a third verify voltage in the first program loop, the second verify voltage being higher than the first verify voltage, the third verify voltage being higher than the second verify voltage, and
• supply the third verify voltage without supplying the first and second verify voltages in the second program loop.