Memory management system with power source and method of manufacture thereof

A method of manufacture of a memory management system comprising:

• mounting a volatile memory device on the front of dual in-line memory module carrier;
• mounting a non-volatile memory on the backside of the dual in-line memory module carrier opposite the volatile memory device;
• mounting an uninterruptible power supply on the dual in-line memory module carrier, the uninterruptible power supply configured to maintain a memory module power when a system power input decays including coupling a back-up power input to a secondary power source, and wherein the memory module power is reduced by less than 20 millivolts (mV) during a transition time when the memory module power is transitioned from the system power input to a back-up power input wherein the uninterruptible power supply increases the secondary power source from a first voltage to a second voltage upon detecting a loss of system power from the system power input, and wherein the transition time based on an amount of current drawn by the memory management system;
• and
• mounting a controller logic integrated circuit on the dual in-line memory module carrier coupled to the volatile memory device, the non-volatile memory, and the uninterruptible power supply, the controller logic integrated circuit configured to copy data content of the volatile memory device to the non-volatile memory when the uninterruptible power supply detects that the system power input has decayed to a first cross-over level, and enabling a back-up transistor to utilize the secondary power source.

A memory management system comprising:

• a dual in-line memory module carrier;
• a volatile memory device mounted on the dual in-line memory module carrier;
• a non-volatile memory mounted on the dual in-line memory module carrier on a side opposite the volatile memory device;
• an uninterruptible power supply on the dual in-line memory module carrier, the uninterruptible power supply configured to maintain a memory module power when a system power input decays, and
• wherein the memory module power is reduced by less than 20 millivolts (mV) during a transition time when the memory module power is transitioned from the a system power input to a back-up power input, wherein the uninterruptible power supply increases the secondary power source from a first voltage to a second voltage upon detecting a loss of system power from the system power input, and
• wherein the transition time based on an amount of current drawn by the memory management system;
• and
• a controller logic integrated circuit mounted on the dual in-line memory module carrier coupled to the volatile memory device, the non-volatile memory, and the uninterruptible power supply, the controller logic integrated circuit configured to copy data content of the volatile memory device to the non-volatile memory when the uninterruptible power supply detects that the system power input has decayed to a first cross-over level.