Memory short protection system

An information handling system (IHS), comprising:

• a power supply system including a first power rail that is configured to provide a first current when no short is associated with the power supply system;
• a processing system coupled to the power supply system;
• a memory system that is coupled to the processing system and that includes a memory device connector that is configured to couple to a memory device, wherein the memory device connector includes a first pin that is coupled to the first power rail, and a second pin that is located adjacent the first pin;
• a short detection circuit coupled to the first pin, wherein the short detection circuit is configured to:
• cause, prior to the first current being provided from the first power rail, a second current to be provided from the first power rail that is less than the first current and that is configured such that a memory device coupled to the memory device connector will not be damaged when a short exists across the first pin and the second pin;
• compare the second current to a first short detection current;
• determine whether a short exists across the first pin and the second pin based on the comparing of the second current to the first short detection current;
• and
• prevent the first current from being provided from the first power rail to the memory device connector in response to determining a short exists across the first pin and the second pin.

A method for detecting a short in a memory system, comprising:

• receiving a memory device in a memory device connector that includes a first pin that is coupled to a first power rail and a short detection circuit, and a second pin located adjacent the first pin, wherein the first power rail is configured to provide a first current when no short exists across the first pin and the second pin;
• causing, using the short detection circuit and prior to the first current being provided from the first power rail, a second current to be provided from the first power rail that is less than the first current and that is configured such that the memory device coupled to the first pin and the second pin will not be damaged when a short exists across the first pin and the second pin;
• comparing, using the short detection circuit, the second current to a first short detection current;
• determining, using the short detection circuit, whether a short exists across the first pin and the second pin based on the comparing of the second current to the first short detection current;
• and
• preventing, using the short detection circuit, the first current from being provided from the first power rail to the memory device connector in response to determining a short exists across the first pin and the second pin.