Forward late predictive rendering in a graphics system
AssigneeSamsung Electronics Co., Ltd.
InventorsJohn W. Brothers, Santosh Abraham
Life of this patent
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Abstract
A graphics processing operation may include a set of render target operations, in which render targets are read and one or more intermediate computations are performed before generating final render target output. A method of performing graphics processing includes determining a dependency between render targets and defining a scheduling of tiles to reduce or eliminate a need to write intermediate computations to external memory. An interleaved order may be determined to maintain intermediate computations of dependent render target operations in an on-chip cache hierarchy.
Claims18
In a graphics processing system, a method comprising:
- determining a dependence relationship between at least two render targets (RTs) of a graphics processing operation;
- performing a tile mapping of destination tiles to source tiles based on the dependence relationship and utilizing the tile mapping to determine an interleaving schedule;
- determining the interleaving schedule defining an order of tile processing of the graphics processing operation to maintain intermediate tile processing results of dependent render targets of the graphics processing operation in an on-chip cache;
- and
- rendering tiles using the interleaving schedule;
- wherein performing tile mapping comprises mapping a destination tile back to source tiles.
In a graphics processing system, a method comprising:
- determining a dependence relationship between at least two render targets (RTs) of a graphics processing operation;
- determining an interleaving schedule defining an order of tile processing of the graphics processing operation to maintain intermediate tile processing results of dependent render targets of the graphics processing operation in an on-chip cache;
- and
- rendering tiles using the interleaving schedule;
- wherein source tiles that are not required to produce the destination tile are not included in the interleaving schedule eliminating unneeded work.
In a graphics processing system, a method comprising:
- determining a dependence relationship between at least two render targets (RTs) of a graphics processing operation;
- determining an interleaving schedule defining an order of tile processing of the graphics processing operation to maintain intermediate tile processing results of dependent render targets of the graphics processing operation in an on-chip cache;
- and
- rendering tiles using the interleaving schedule;
- wherein a number of levels of the dependency mapping is limited to truncate the dependency mapping.
In a graphics processing system, a method comprising:
- determining a dependence relationship between at least two render targets (RTs) of a graphics processing operation;
- performing a tile mapping of destination tiles to source tiles based on the dependence relationship;
- scheduling an interleaved order of tile processing for a sequence of render target steps having a dependency of render targets utilizing the tile mapping, the interleaved order selected to maintain a set of intermediate tile processing computations of dependent render targets in an on-chip cache of a graphics processing unit in the graphics processing system;
- and
- rendering tiles using the interleaving order of tile processing,
- wherein performing tile mapping comprises mapping a destination tile back to source tiles.
In a graphics processing system, a method comprising:
- scheduling an interleaved order of tile processing for a sequence of render target steps having a dependency of render targets, the interleaved order selected to maintain a set of intermediate tile processing computations of dependent render targets in an on-chip cache of the graphics processing system;
- and
- rendering tiles using the interleaving order of tile processing;
- wherein the tile-level dependency is determined by mapping a destination tile back to source tiles to determine a dependency mapping.
In a graphics processing system, a method comprising:
- scheduling an interleaved order of tile processing for a sequence of render target steps having a dependency of render targets, the interleaved order selected to maintain a set of intermediate tile processing computations of dependent render targets in an on-chip cache of the graphics processing system;
- and
- rendering tiles using the interleaving order of tile processing;
- wherein the interleaved order is further selected based on the dependency to omit tiles not required by the dependency to generate a final result of the sequence of render target steps.
A graphics system, comprising:
- a graphics processing unit having an on-chip cache;
- a dependency analysis module to determine dependencies in a graphics processing operation including a set of interdependent render target operations;
- and
- a scheduling module to schedule an interleaved order of tile processing of the graphics processing operation, based on the dependency analysis, to maintain intermediate tile processing computations in the on-chip cache of the graphics processing unit,
- the graphics system being configured to:
- perform a tile mapping of destination tiles to source tiles based on the dependence relationship, wherein the tile mapping is utilized to determine the schedule of the interleaved order;
- and
- render tiles using the schedule of the interleaved order,
- wherein performing tile mapping comprises mapping a destination tile back to source tiles.
Dependencies are inferred from the claim text.