Integrated circuit (IC) design analysis and feature extraction

A computer program product comprising program code stored on a non-transitory computer-readable medium, which when executed by at least one computing device, causes the at least one computing device to analyze a design of an integrated circuit (IC) by performing actions including:

• defining extraction parameters for the design of the IC for each of a set of failure modes;
• testing the design of the IC for a failure mode in the set of failure modes;
• identifying a defined extraction parameter from the design of the IC for at least one of the set of failure modes;
• correlating the identified defined extracted parameter and each of the at least one failure mode for the design of the IC,
• wherein the correlating of the identified defined extraction parameter and each of the at least one failure mode includes defining a variable-based mathematical relationship between the identified defined extraction parameter and each of the at least one failure mode;
• and
• creating a normalized parameter equation representing the correlation of the identified defined extraction parameter with the at least one failure mode for the design of the IC in numerical form,
• wherein the creating of the normalized parameter equation in numerical form includes substituting the variable-based mathematical relationship with at least one numerical value.

A computer program product comprising program code stored on a non-transitory computer-readable medium, which when executed by at least one computing device, causes the at least one computing device to analyze a design of an integrated circuit (IC) by performing actions including:

• defining extraction parameters for the design of the IC for each of a set of design phases in forming the IC;
• testing the design of the IC for a failure mode in at least one of a set of failure modes;
• identifying a defined extraction parameter from the design of the IC for at least one failure mode in the set of failure modes in at least one design phase in the set of design phases;
• correlating the identified defined extracted parameter, each of the at least one failure mode, and the at least one design phase of the IC,
• wherein the correlating of the identified defined extraction parameter, the at least one failure mode and the at least one design phase includes defining a variable-based mathematical relationship between the identified defined extraction parameter, the at least one failure mode and the at least one design phase;
• and
• creating a normalized parameter equation representing the correlation of the identified defined extraction parameter, the at least one failure mode, and the at least one design phase of the IC in numerical form,
• wherein the creating of the normalized parameter equation in numerical form includes substituting the variable-based mathematical relationship with at least one numerical value.