US 9,754,069 B2Granted

Determining slack estimates for multiple instances of a cell in a hierarchical circuit design

AssigneeSynopsys, Inc.

InventorsQiuyang Wu, Chang Zhao

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Abstract

Embodiments perform static timing analysis using a digital representation of a circuit. The digital representation of the circuit includes multiple instances of a cell in a hierarchical cell block circuit. Timing context information is determined for each instance of the cell included in the circuit. A merged timing context information is determined to bound and cover each of the plurality of instances of the cell. A slack estimate is determined for a pair of ports for each instance of the cell. The instance with the smallest slack estimate is identified. A slack estimate for a pair of ports of the cell is determined based on the merged timing information of the cell. A timing credit is determined for the pair of ports based on the slack of the instance with the smallest slack and the slack estimate from the bound information for the pair of ports.

Claims21

Dependent claims

A method for performing static timing analysis comprising:

receiving digital representation of a circuit, the digital representation of the circuit including a plurality of instances of a cell, the cell having a plurality of ports, the digital representation of the circuit for subsequent design and manufacturing of a circuit;
receiving timing context information for each of the plurality of instances of the cell;
determining a slack estimate for pair of ports for each of the plurality of instances of the cell;
identifying an instance of the plurality of instances of the cell with a smallest slack estimate;
determining a bound on the slack estimate for a pair of ports of the cell based on the timing context information for each of the plurality of instances of the cell;
determining, by a computer, a timing credit for the pair of ports of the cell based on the slack of the instance with the smallest slack and the bound on the slack estimate for the pair of ports;
determining, by the computer, a slack estimate for the pair of ports of the cell by adjusting the bound on the slack estimate for the pair based on the timing credit for the pair;
and
performing static timing analysis of the circuit based on the determined slack estimate.

6 more elements

A non-transitory computer readable storage medium storing instructions, the instruction when executed by a processor cause the processor to:

receive digital representation of a circuit, the digital representation of the circuit including a plurality of instances of a cell, the cell having a plurality of ports;
receive timing context information for each of the plurality of instances of the cell, the digital representation of the circuit for subsequent design and manufacturing of a circuit;
determine a slack estimate for pair of ports for each of the plurality of instances of the cell;
identify an instance of the plurality of instances of the cell with a smallest slack estimate;
determine a bound on the slack estimate for a pair of ports of the cell based on the timing context information for each of the plurality of instances of the cell;
determine a timing credit for the pair of ports of the cell based on the slack of the instance with the smallest slack and the bound on the slack estimate for the pair of ports;
determine a slack estimate for the pair of ports of the cell by adjusting the bound on the slack estimate for the pair based on the timing credit for the pair;
and
perform static timing analysis of the circuit based on the determined slack estimate.

6 more elements

A system comprising:

a processor;
and
a non-transitory computer readable storage medium storing instructions, the instruction when executed by the processor cause the processor to:
receive digital representation of a circuit, the digital representation of the circuit including a plurality of instances of a cell, the cell having a plurality of ports, the digital representation of the circuit for subsequent design and manufacturing of a circuit;
receive timing context information for each of the plurality of instances of the cell;
determine a slack estimate for pair of ports for each of the plurality of instances of the cell;
identify an instance of the plurality of instances of the cell with a smallest slack estimate;
determine a bound on the slack estimate for a pair of ports of the cell based on the timing context information for each of the plurality of instances of the cell;
determine a timing credit for the pair of ports of the cell based on the slack of the instance with the smallest slack and the bound on the slack estimate for the pair of ports;
determine a slack estimate for the pair of ports of the cell by adjusting the bound on the slack estimate for the pair based on the timing credit for the pair;
and
perform static timing analysis of the circuit based on the determined slack estimate.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/885,920Filed 16 Oct 2015
Published: US 2017/0109468 A120 Apr 2017
Granted: 5 Sep 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

G06F 30/3312
Using simulation: timing analysis
G06F 30/398
Circuit design at the physical level: design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or…
G06F 2119/12
Details relating to the type or aim of the analysis or the optimisation: timing analysis or timing optimisation
G06F
Computing and data processing