Method for process variation analysis of an integrated circuit
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-Cheng Kuo, Kmin Hsu, Wei-Yi Hu, Wei Min Chan, Jui-Feng Kuan
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-Cheng Kuo, Kmin Hsu, Wei-Yi Hu, Wei Min Chan, Jui-Feng Kuan
Estimating the term…
A method and a corresponding system for process variation analysis of an integrated circuit are provided. A netlist is generated describing electronic devices of an integrated circuit in terms of device parameters and process parameters. The process parameters include local process parameters individual to the electronic devices and global process parameters common to the electronic devices. Critical electronic devices are identified having device parameters with greatest contributions to a performance parameter of a design specification of the integrated circuit. Sensitivity values are determined for the global process parameters and local process parameters of the critical electronic devices. The sensitivity values represent how sensitive the one or more performance parameters are to variations in the global and local process parameters of the critical electronic devices. Monte Carlo (MC) samples are sorted based on the sensitivity values.
A method for process variation analysis of an integrated circuit, the method comprising:
A system for process variation analysis of an integrated circuit, the system comprising:
A method for process variation analysis of an integrated circuit, the method comprising:
Dependencies are inferred from the claim text.